Pcie the inbound and outbound

Inbound:PCI domain accesses memory domain

Outbound: Memory domain accesses PCI domain

RC access EP: RC memory domain->outbound->RC PCI domain->EP PCI domain->inbound->EP memory domain

EP accesses RC: EP memory domain->outbound->EP PCI domain->RC PCI domain->inbound->RC memory domain

Out is going out. The side that initiates the access needs to perform outbound to access the peer end

In comes in, the accessed side needs to perform inbound, so that the opposite end can access

EP access RC demo sample (blue arrow):

(1) First, EP needs to be configured with outbound, and RC needs to be configured with inbound (generally, the RC end does not need to be configured), so that the mapping from EP end 0x20000000 to RC end 0x50000000 is established

(2) Change the content of 0x50000000 on the RC side, and the EP side can see the corresponding changes.Read/write 0x20000000 from EP side and read/write 0x50000000 from RC side, the result is the same

RC access EP demo sample (black arrow):

(1) First of all, the RC side needs to be configured with outbound (generally configured in the kernel), and the EP side needs to be configured with inbound (0x5b000000 inbound to BAR2), thus establishing the mapping from RC side 0x20100000 (BAR2) to EP side 0x5b000000

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(2) Change the content of 0x5b000000 memory on the EP side, you can see the corresponding changes on the RC side 0x20100000, read/write 0x20100000 from the RC side and read/write 0x5b000000 from the EP side, the result is the same