4. Analysis of the execution process of make modules for general purposes

     Search top level makefile There will be two modules The goal is , Their definitions are shown in the figure 3.13 and 3.14, Check the code and find that they are located in ifeq ($(KBUILD_EXTMOD),) and else In the condition of .KBUILD_EXTMOD Refer to figure 2.5, That is, if the compiled module is an external module （ contain M=xxx Parameters ）, Set it to 1, Otherwise 0, So the first one modules The target will call when compiling non external modules , And the second one. modules Call only when compiling external modules . obviously , There is no designated M=xxx, So I will use the first modules Definition of goals .

                                           chart 3.13

                                           chart 3.14
     It depends on vmlinux-dirs,modules.builtin, if KBUILD_BUILTIN Value is not 0 when , It also needs to rely on vmlinux, Let's not think about vmlinux The situation of .vmlinux-dirs Refer to figure 3.5, It is kernel Compile in the top-level directory vmlinux Required subdirectories .
     Rules and generation of the target vmlinux At the same time , Refer to figure for details 3.7, So the actual order is ：
    $(MAKE) $(build)[email protected]
     among [email protected] Is the target vmlinux-dirs Value , So the command is to enter vmlinux-dirs Specified subdirectories , Then perform recursive compilation , Until all defined targets are compiled . Let's go back to makefile.build How to compile module related targets . Its rules can be found in Figure 6.12, Here we post it again （ chart 3.15）.
                                           chart 3.15
     and KBUILD_MODULES and KBUILD_BUILTIN The definition of is shown in the figure 3.16, According to our compilation command, at this time KBUILD_MODULES by 1, and KBUILD_BUILTIN by 0. According to the above figure, its dependence is obj-m,modorder-target and subdir-ym.

                                           chart 3.16
    obj-m It is included in the subdirectory makefile As defined in , It is divided into multi-used-m and single-used-m Two parts , For specific generation rules, please refer to chapter 5 strip . namely single The goal will pass cc The defined cross compiler compiles a single file into an object file ,multi In addition to compiling the target , You also need to call ld The defined cross linker links the various target files .

                                           chart 3.17
    subdir-ym Refer to figure for the definition of objectives 6.9, It is a collection of all subdirectories of the current directory . Its rule definition can refer to figure 6.30, That is, each subdirectory will be called separately makefile.build, And its obj The parameter is directory name . Its function is under the subdirectory obj-m The target is compiled according to the same rules as above , Then call the subdirectories of the subdirectories respectively makefile.build, Until there is no subdirectory . Through this process, all the contents in the subdirectory will be obj-m The targets are compiled .
    modorder-target be located makefile.build In file , It is defined as follows , That is to pass it on to makefile.build Parameters of obj plus modules.order constitute . obviously , It means in every call makefile.build Create one under the subdirectory of modules.order file .
    modorder-target := $(obj)/modules.order
     Let's take a look at the rules of this goal, as shown in the figure 3.18, Its dependence subdir-ym We've already talked about that , Next, focus on the command .

                                           chart 3.18
    cat /dev/null > test It can actually be used to generate an empty file test, We can make one as shown in the figure 3.19 The experiment of . This command also calls modorder-cmds, And write their output to modorder-target in ,modorder-target It is under each directory introduced above modules.order file .

                                           chart 3.19
     We'll see modorder-cmds The definition of , It will traverse modorder Variable , Then match %/modules.order The variable of , The contents of this file will be output . For other variables , Will add kernel/ Print variable information after .
    modorder The definition of variables is shown in the figure 3.20, Its composition is divided into two parts , One is to filter out the current directory obj-y Defined directory （ That is, the subdirectories that need to be compiled ）, Then add modules.order. The other part is to obj-m Target .o The suffix is changed to .ko The value of the suffix .

                                           chart 3.20
     According to the above analysis , This command is used to traverse the subdirectories of this directory modules.order file , And under this directory obj-m Defined goals , Then write their contents into the modules.order file . Because the compilation process is recursive to the directory , So first generated ko The target is in front of the file , The generated target is located behind the file , This file is all under this directory and its subdirectories obj-m Compilation order of the target .
     about modules.builtin rely on , You can guess that the content contained in it should be modules compiled into the kernel . We know that when configuring the kernel , There are three options for module related configuration y,m and n Of , When the configuration is n Indicates that the module is not compiled , Configure to m Indicates that it will be compiled into modules , And the configuration is y It will be compiled into the kernel . This dependency is generated in various directories modules.builtin file , The content of the file is to collect the configuration contained in this directory and its subdirectories as y Module information .
     Its specific generation rules are similar to modules.order The generation method is very similar , It just calls scripts/makefile.modbuiltin file , In this file, we will collect builtin modular , Then use its subdirectories as targets , Recursively call itself （scripts/makefile.modbuiltin）, To complete all builtin Collection of goals .
    ok, Dependency analysis is complete , Look at the commands it invokes , Let's paste them again , Pictured 3.21.

                                           chart 3.21
     Article 1 with a awk The order is mainly to modules.order Delete duplicate lines in the file . Second kecho The command is just a print message . The key content is in the next two .
     The third command calls scripts/makefile.modpost file , Let's see what the document does . You can see from the file ko The final generation rule is shown in Figure 3.22, It depends on the same name .o Document and .mod.o file , After dependency satisfaction , Would call cmd_ld_ko_o The command links them , So as to produce the final ko file .

                                           chart 3.22
     among .o File in front stage 1 It has been generated by , The rest is .mod.o The generation of , Its rules are shown in the figure 3.23, That is, it will depend on the corresponding mod.c file , If the dependency is satisfied , Call the cross compilation command to convert the .c File compiled into .o file .

                                           chart 3.23
     The next natural thing is to find mod.c The source of the document , Its definition is shown in the figure 3.24, That is, it will rely on __modpost. Its dependencies are shown in the figure 3.25, That is, it will eventually call modpost command . The order is made by scripts/mod/modpost.c compiled , Interested students can study its implementation .

                        ; chart 3.24

                                           chart 3.25