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Load/store access instruction of arm instruction set (2)
2022-06-12 11:50:00 【fanxiaoyu321】
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This note records the second kind of Load/Store Instructions , That is, the operand is 16 Bit halfword and signed byte data Load/Store Instructions .
| Mnemonic symbol | explain |
|---|---|
| LDRH | Half word data read instruction |
| STRH | Half word data write instruction |
| LDRSB | Signed byte data read instruction |
| LDRSH | Signed halfword data read instruction |
Addressing mode
These instructions have a consistent way of addressing , See here .
| grammar | explain | |
|---|---|---|
| 1 | [<Rn>, #+/-<offset_8>] | Immediate offset addressing |
| 2 | [<Rn>, +/-<Rm>] | Register offset addressing |
| 3 | [<Rn>, #+/-<offset_8>]! | Immediate pre update addressing |
| 4 | [<Rn>, #+/-<Rm>]! | Register pre update addressing |
| 5 | [<Rn>], #+/-<offset_8> | Immediate post update addressing |
| 6 | [<Rn>], +/- | Register post update addressing |
LDRH( Half word data read instruction )
LDR{<cond>}H <Rd>, <address_mode>
if CondPassed(cond) then
if address[0] == 0 then
data = Mem[address, 2]
else
data = Unknown
Rd = data
so , This instruction requires that the address must be half word aligned .
STRH( Half word data write instruction )
STR{<cond>}H <Rd>, <address_mode>
if CondPassed(cond) then
if address[0] == 0 then
data = Rd[15:0]
else
data = Unknown
Mem[address, 2] = data
Again , This instruction requires that the address must be half word aligned .
LDRSB( Signed byte data read instruction )
LDRSB Read a byte of data from memory and save it in the low of the destination register 8 position , Then fill the high of the destination register according to the sign bits 24 position , This generates the final 32 digit .
LDR{cond}SB <Rd>, <address_mode>
if CondPassed(cond) then
data = Mem[address, 1]
Rd = SignExtend(data)
LDRSH( Signed halfword data read instruction )
LDRSH Read a half word data from memory and save it in the low of the target register 16 position , Then fill the high of the destination register according to the sign bits 16 position , This generates the final 32 digit .
LDR{<cond>}SH <Rd>, <address_mode>
if CondPassed(cond) then
if address[0] == 0 then
data = Mem[address, 2]
else
data = Unknown
Rd = SignExtend(data)
Again , This instruction requires that the address must be half word aligned .
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