LDO investigation

LDO stands for low dropout regulator, which is a low dropout linear regulator.This is relative to traditional linear regulators.Traditional linear regulators, such as 78XX series chips, require that the input voltage is at least 2V~3V higher than the output voltage, otherwise it will not work properly.But in some cases, such conditions are obviously too harsh, such as 5V to 3.3V, the voltage difference between input and output is only 1.7v, which obviously does not meet the working conditions of traditional linear regulators.In response to this situation, chip manufacturers have developed LDO-type voltage conversion chips.
Voltage dropout, noise, power supply rejection ratio (PSRR), quiescent current Iq, these are the four key data of LDO.
Product designers choose LDOs according to the electrical performance requirements of product loads combined with four major elements.
LDOs used in mobile phones require as little noise (ripple) as possible, and portable products without RF require LDOs with low quiescent current.

Dropout

Vin >= Vdrop + Vout.
And generally need two external capacitors: Cin, Cout, generally using tantalum capacitors or MLCC.
Note: LDO is a voltage regulator.

The typical dropout voltage values ​​are 50mV, 200mV, 240mV and 400mV.

[1]Peng Yu. An NMOS LDO without off-chip capacitor[D].Tianjin University of Technology, 2022.
The typical dropout voltage is about 82mV;【1.7V-1.2V-82mV】
When the input voltage is in the range of 1.7-5.5V, the output voltage is in the range of 1.2-5V.

Noise Noise

Power Supply Rejection Ratio (PSRR)

The power supply voltage rejection ratio of general LDOs is 70dB~80dB, and a few are about 58dB.

It can be seen that at low frequency, the PSRR is 83 dB, and when the frequency is 100 kHz, the PSRR is still 30