8086 CPU internal structure

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8086 CPU internal structure

classification

1. Structures can be divided into physical results and programming structures .
2. Chips can be divided into programmable chips and non programmable chips .

Programming structure

Bus structure unit BIU

1. Register group

   • Segment register ：CS（ Code segment ）、DS（ Data segment ）、SS（ stack segment ）、ES（ Additional segment ）
   • Instruction pointer register ：IP It belongs to instruction pointer register , It can only store instruction addresses .
   • IP The address of the next instruction to be executed is stored in .
   • SS Stack segments are used to store temporary data .
   • ES Additional segments are used to store additional data .
   • The segment register stores the segment address of the current program .

2. Address adders ： Through the address adder, segment address and pointer address can be calculated to get 20 Physical address of bit , And save the changed address in memory .

3. Command queue

   • A queue that stores a collection of instructions （ fifo ）
   • EU The instructions executed can only come from the instruction queue .
   • Internal 6 Bytes of storage space .
   • When two or more empty bytes appear in the queue ,BIU Continue to store addresses in the queue .

4. Bus cycle

   • BIU The time to do a job is called bus cycle .
   • A bus cycle has at least 4 Clock cycles （T1 ～ T4）.
   • T1： Sending address
   • T2： Revocation address , Prepare for data transmission
   • T3： The data transfer
   • T4： End transmission , End this bus cycle

execution unit EU

1. Register group

   • 4 General registers ：AX、BX、CX、DX

   • 4 Special registers ：SP（ Stack pointer register ）、BP（ Base pointer register ）、DI（ Destination address register ）、SI（ Source address register ）

   • 8 Both registers are 16 Bit .

   • General purpose registers can be divided into high 、 low 8 Bit store data .nX Can be divided into nH and nL form .

2. ALU Logical unit of operation

3. Flag register （PSW）

   • 16 position ,8086 The actual use is 9 position .
   • 6 Status flag bits ：CD（ Carry mark ）PF（ Parity mark ）AF（ Half carry sign ）ZF（ Zero mark ）SF（ sign indicator ）OF（ Overflow sign ）
   • 3 Control flag bits ：TF（ Single step interrupt flag ）IF（ Interrupt allow flag ）DF（ Direction signs ）

4. chart

   

   

Working conditions

1. Power supply
   • Positive pole ：VCC
   • Negative pole ：GND
2. The clock ： adopt CLK Connect the clock
3. Reset ：RESET
4. Get the signal ready ：READY

Pin definition

1. Positive pole ：VCC

2. Negative pole ：GND

System composition

Programming methods

Memory structure