Inverter Phase Locking Principle and DSP Implementation

A phase-locked loop (PLL) refers to a circuit or module whose function is to process the received signal and extract the phase information of a certain clock from it.In other words, for the received signal, a clock signal is simulated so that the two signals are synchronized from a certain point of view.

How the PLL works

In the case of phase locking, the imitated signal and the captured signal have a fixed phase difference, so it is called a phase lock.Usually a negative feedback structure.
As shown in the figure, the phase lock generally consists of three parts: phase detector (PD), loop filter (LF) and voltage controlled oscillator (VCO).

Phase detector: composed of analog multipliers

Loop filter: usually a low-pass filter, the main function is to filter out the "sum-frequency signal" generated by the phase detector, and its purpose is to obtain the phase angle between the input and output signals

Voltage Controlled Oscillator: The phase angle difference output after passing through the loop filter is adjusted at the fundamental frequency, which is equivalent to the integral link of the hardware.

Mathematical Modeling

Phase Detector Mathematical Model (P) - Rapidity:

Loop Filter Mathematical Model (PI) - Stability:

Voltage Controlled Oscillator Mathematical Model (I) - Stability:

Model simulation analysis

P limiting + integrating PLL control

Incremental PI PLL control

P limiting + frequency tracking PLL control

Software digital phase locked loop design

Power frequency genlock technology software design block diagram