Several forms of buffer in circuit

Several forms of caching ：

1. Double port ram structure , Is in SRAM There are two independent data lines on the , Address line , Read write control line , Allow two independent systems to have random access to the memory at the same time ;（DRAM Only single port ）

2. FIFO structure , It's a first in, first out data buffer , Double ended operation is possible , But it must meet the requirements of "first in, first out" , No random access ;

3. Ping Pong ram structure , Is to input data into the stream By selecting the unit Isochronous Assigned to Two ram buffer , Through two ram Reading and writing To realize the pipelined transmission of data .

Ping Pong ram and Double port ram The difference between ：

1. Double port ram It corresponds to a memory bank , And ping pong ram It corresponds to two independent storage banks ;

2. Double port ram When accessing the same address , Only the same location of the memory can be executed , But for ping pong ram Then point to SRAM1 and SRAM2 Two storage banks of ;

So ping pong ram It is more suitable for systems with high-speed big data transmission , The function is to use multiple low-speed data preprocessing modules to process high-speed input data streams . Table tennis ram In the middle RAM1 and RAM2 It can be any enclosure , It can be FIFO,SRAM, Or is it DDR３ Inside BANK, You can define it yourself ;