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DCDC circuit - function of bootstrap capacitor

2022-07-05 08:10:00 Learning notes of hardware Xiaobai

Recently, when Xiaobai was working on a project , Used one Charge IC. Speaking of Charge IC, Because I just entered the workplace for more than a year . The circuit design of the project is relatively simple , Customers' demand for charging is also very general . So I worked for a year , To really touch Charge IC This species .

Through project learning ,Charge IC In fact, it also uses BUCK Knowledge of circuits , Therefore, the peripheral design of the chip is not very strange . Maybe for previous projects BUCK The reason why the chip peripheral design is relatively simple , What has not been noticed is the bootstrap capacitor , Peripheral pins of the chip BTST And SW An indirect capacitor , It belongs to bootstrap capacitor .
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In the past DC-DC In chip , Xiao Bai's pale experience , I have never seen such a design . therefore , In order to figure out every peripheral design that you are not familiar with , I checked the data , Have a simple understanding of this .

Bootstrap capacitors are compared with other ordinary capacitors , No big difference , Mainly used , The voltage difference between the two ends of the capacitor cannot be abrupt Principle . When increasing the voltage at the negative end of the capacitor , The voltage at the positive end will also be raised , The differential pressure remains constant .

Take the illustration in the picture .
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Q2 HSFET(High Side Mosfet) That is, the high side MOS tube Q3 LSFET(Low Side Mosfet) That is, the low side MOS tube .

As the saying goes , Depend on the mountain to eat the mountain , Draw on the water . about Q3 MOS In terms of , Its S Extremely close GND. Therefore, it is very easy to control its conduction and disconnection . Just let the grid voltage be greater than MOS Tubular Vgs(th) that will do . The connection and disconnection of the low side is a good solution , But it's bitter on the high side . Dad doesn't hurt , Mother doesn't love . Its S Pole connection SW, Grid connected BTST. Want to let Q2 Conduction , Must satisfy VBTST>VSW+Vgs(th). VSW It can be regarded as VBUS voltage . For the whole chip , The largest one at the power supply end should be no better than VBUS Still big , So in this case , How can we get more than VBUS To meet VBTST>VSW+Vgs(th) Make the high side MOS The pipe is open .

here , Bootstrap capacitor , Played a great role .

First , At the lower end MOS The pipe is open , Top MOS When the pipe is disconnected .SW Voltage is 0. The capacitance receives from REGN LDO The charge of begins to be charged . Voltage is Vc.

However , At the lower end MOS When the pipe is disconnected , Top MOS When the tube is on . Its S The pole voltage is equal to SW The voltage is approximately VBUS voltage , However, because the voltage difference between the two ends of the capacitor cannot change suddenly ,VBTST Be elevated . Its value is Vc+VBUS Supply power to the grid , Compare the grid voltage with the source voltage , The differential pressure is Vc, For a capacitor voltage , Top MOS The pipe is open .

Due to the existence of diodes , Prevent current backflow ,REGN LDO The output voltage of is always stable and free from VBTST The impact of changes in .

I said that before , The capacitor plays a role in charging , So the capacitance of bootstrap capacitor should be appropriate , Not too small , Too small will cause capacitance voltage difference Vc Too small , Make the high side MOS The tube cannot be connected . Most of the selected values are 10nF-1uF Between .

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