Verilog Learning Series

 Personal study and organization - Verilog series summary
 Reference book: Verilog digital system design tutorial (third edition) edited by Xia Yuwen et al

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1. Verilog study notes

1. Chapter 5 Conditional Statements, Loop Statements, Block Statements, Generated Statements
2. Chapter 6 Structure Statements, System Tasks, Function Statements and Display System Tasks

Second, Verilog online simulation learning

• HDLBits provides Verilog basic syntax tutorials and online simulation of Verilog modules.
• Solutions for online exercises: Each unit answers
• Reprinted in Zhihu OpenIC Special Interest Group: HDLBits: Online Learning Verilog

Three, Verilog Question Answers

1. Introduction questions answers
2. Chapter 1 Question Answers
3. Chapter 2 Question Answers
4. Chapter 3 Question Answers
5. Chapter 4 Question Answers
6. Chapter 5 thinking questions answers
7. Chapter 6 Question Answers
8. Chapter 7 Question Answers
9. Chapter 9 Question Answers
10. Chapter 10 Question Answers
11. Chapter 11 Question Answers
12. Chapter 12 Question Answers
13. Chapter 13 Question Answers
14. Chapter 14 Question Answers

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Summary

   The above is the entire content of the Verilog series for personal study. We will continue to update the notes and answers to the thinking questions in the future.