Design of logic level conversion in high speed circuit

A lot now SOC Devices in order to reduce power consumption , All the IO The level of the port is designed as 1.8V, Nuclear voltage 0.85V, When this SOC As the master platform , In the interface design, we need to pay special attention to the level matching . It is often necessary to put 1.8V The level of is converted to 3.3V Or into 5V. If you don't notice the level matching between the input and output signals , The system will not work properly .

This article mainly starts with two simple cases , Some problems needing attention in analyzing level conversion circuit , And the interpretation of several important parameters in this kind of chip data manual , For developers , Mastering the parameters of these devices is the focus of device selection .

1. The triode does level conversion

Make it with common triode 1.8V turn 3.3V Case study . The circuit diagram is as follows ：

OC Gate output circuit , It is one of the more common methods to do level conversion in a single board . When INPUT The signal is 1kHz Frequency ,2N3904 There will be no problem in dealing with it . The following is a simulation .

If the frequency of the input signal is increased to 1MHz, Carefully observe the level of input and output signals , It can be seen that the rising edge of the output signal has slowed down at this time .

Now increase the frequency to 10MHz, The output waveform has become a triangular wave , The output signal has been distorted .

imagine , If this circuit is used for a video transmission signal , The data transmission rate is 27M, The data signal level output by the main platform 1.8V, Use this circuit to 1.8V The switch to 3.3V, The receiving end will cause errors in the received data due to distortion .

2. MOS Tube to do level conversion

The following circuit is generally used in the serial port level conversion circuit of a single board .R3 can NC fall .

Use this circuit UART Conversion of signal level , as long as MOS There is no problem with the selection of pipes , Basically, it can be used in the circuit normally , The analysis is as follows ：

The commonly used baud rate of serial port is 115200, According to the starting bit , Data bits , Check bit , Transmit one bit The time required is 8.6us. Suppose the sequence of transmitted data is 1010101010……, Then a cycle is 8.6us, The maximum required switching frequency is 116K about . This frequency , common MOS Tube switching frequency can be achieved . The simulated waveform is as follows .

It proves our theoretical analysis , In fact, the data sent by the serial port cannot be 10101010… Such a regular sequence , Yes MOS The rate of tube opening and closing may be lower .

According to the above level conversion based on the separation device , It can be concluded that ：

MOS Transistor or triode as level conversion circuit , Need to see MOS When transistor and triode are used as switches , Can you have enough ability （ bandwidth ） Process high-speed changing level signals .

use OC/OD The devices of the gate do level conversion , The level degrees of freedom on both sides are relatively large .

3. Integrated level conversion

Integrated level conversion is usually used in single board TI Of 74 Series and ADI Of ADG series . Here is ADI The level conversion chip ADG3301. It can be clearly judged from the manual that the maximum data level conversion rate supported by the chip is 50Mbps.

TI Some chips in the data book will also clearly identify the data rate that the device supports level conversion . It should be noted that , The two ends are different level conversion , The maximum speed that the device can support is different .

This kind of integrated chip is used , Select the type directly according to the bandwidth of the device , You don't need to consider things like triodes and MOS Whether the bandwidth of such separation devices is sufficient , It can save a lot of time in design .

4. Interpretation of important parameters

Read the data book of the level conversion chip carefully , You can see several parameters related to time . Here is a summary .

（1）transition time

transition time It refers to the signal conversion time , It represents the time that the signal changes between two levels , It is the reciprocal of the slew rate .

Here is NXP Of 74AHC1G07 The data book for ,transition time Describe the ∆t/∆V, This parameter is the requirement of the chip for the output signal of the previous stage , That is, the signal input to it is required to meet the requirements of this parameter , It can accurately identify the change of signal level , And make correct level conversion .

If this parameter does not meet , There are two main risks ： The driving capacity of the front stage signal is insufficient , This signal is susceptible to external interference . The other is 74AHC1G07 Power consumption will increase .

（2）Slew Rate

Slew Rate It is a common parameter of operational amplifier, swing rate , The unit is V/s,V/ms,V/us. This parameter represents the voltage that the signal changes in unit time . If the swing rate is low , The output cannot accurately keep up with the changes of the input signal , Produce distortion . Swaying rate （slew rate） Emphasized voltage change rate , Signal conversion （transition time） The emphasis is on the signal change time .

（3） Propagation Delay

Propagation Delay It refers to the propagation delay of the signal , The simple understanding is the phase difference between the input signal and the output signal .

（4）Skew

Skew It refers to the time difference between two or more time signals . It is generally used in the occasion of clock tree . For example, the clock tree generated by the crystal oscillator , There are 10 Endpoints , also Skew yes 100ps, It means in 10 Among signals , The time difference between the longest clock path and the shortest clock path is 100ps.

This article is from the official account “ Big talk hardware ” 《 Reference to the original ： High speed circuit logic level conversion design 》