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Verilog's random number system task----$random
2022-08-02 10:02:00 【lonely single knife】
目录
概述
在做仿真的时候,Inevitably some data will be required as input.Sometimes the input data is required,Any kind of data will do.这种情况下有两种办法:
- Just write some data,But the amount of data is a big trouble,still mind
- 使用VerilogProvided random number generation system task$randomto help generate a lot of random numbers,A system task all done!
$random 是VerilogProvides a random number generation system task,After calling the task,将会返回一个32bit的integerType of the value of the symbol.Its calling format is3种:
- $random;
- $random();
- $random(seed);
$random与$random()
$random与$random()用起来The method and the result are the same,You can write a littleTB测试一下:
`timescale 1ns / 1ns
module random_test();
reg [31:0] rand_data; //定义一个32位数据
//每10ns产生一个随机数
initial begin
rand_data = 0;
repeat(5) begin
#10 rand_data = $random;
end
#5 $finish;
end
endmodule
上面的TBFile to do is simple:每隔10ns生成一个随机数,重复5次.其结果如下:

可以看到生成了5个32bit 的随机数,There are integers and negative numbers.
接下来我们把上面的TB中的系统任务 $random替换成$random()的,其他不变,Look at the simulation results again:

is consistent with the previous results,这说明$random替换成$random()In fact, the effect is the same,所以我们一般都用$random.
$random的返回值是一个32位的整数,But sometimes such a large number is not necessary.If you want the value of the random number to be fixed in a certain range,那么可以这么使用:$random%b;Then the range of generated random numbers is [ ( -b+1 ) : (b- 1 ) ]. 这其实就是对b取余,Isn't that just framing the scope?!
同样的,用上面的TB测试一下,Generate several random numbers at the same time for easy comparison(除数用10,生成范围[-9:9]):
`timescale 1ns / 1ns
module random_test();
reg [31:0] rand_data; //定义一个32位数据
//每10ns产生一个随机数
initial begin
rand_data = 0;
repeat(10) begin
#10 rand_data = $random%10;
end
#5 $finish;
end
endmodule
其结果如下:
![]()
The generated values are范围[-9:9]内(There are several duplicate notice).
此外,If we wish to generate only random numbers in the positive range,那么可以这么使用:{$random}%b;Then the range of generated random numbers is [ 0 : (b - 1 ) ].
还是用上面的TBTest the result of random number generation in the positive range【0:9】的效果.Look at the simulation results:
![]()
嗯很好,The result is already【0:9】范围内的数了.
$random(seed)
先别说其他的,直接用modelsimSimulate the following module:生成10次【0:9】范围内的随机数:
`timescale 1ns / 1ns
module random_test();
reg [31:0] rand_data; //定义一个32位数据
//每10ns产生一个随机数
initial begin
rand_data = 0;
repeat(10) begin
#10 rand_data = {$random}%10;
end
#5 $finish;
end
endmodule把结果记录下来:

然后把modelsim关了(You can even restart the computer),rest with a cappuccino5分钟,Brush Bilibili、摸摸鱼.
然后重新打开modelsim,Re-simulate the above module,record the result:

咦?奇怪?Why are the two simulation results the same??What about the random number generator function??He's not random.?
实际上,$randomNot a real random number generator,If we call it at the same time every simulation, it is actually the seedseed一致,Then the random number generated is consistent.
In the simulation above,我们省略了seedseed parameter,By the simulation tools generated by default,And the simulation tool to generate seeds are set according to the simulation time.So every time we run a simulation,In fact, they are calling the same at the same timeseed,So it is not surprising that the simulation results are consistent..
忘了说,$random中的seed数据类型可以是reg,integer或者time.
接下来,我们改一下TB,加上seed:
`timescale 1ns / 1ns
module random_test();
reg [31:0] rand_data; //定义一个32位数据
//每10ns产生一个随机数
initial begin
rand_data = 0;
repeat(10) begin
#10 rand_data = {$random(1)}%100;
end
#5 $finish;
end
endmodule
第1times we use 1作为seed,看看结果:

Since every time I use1作为seed,所以10The random numbers generated each time are68(0是初始值,不是随机生成的).
把seed改成10,结果如下:
![]()
Since every time I use10作为seed,所以10The random numbers generated each time are48(0是初始值,不是随机生成的).
所以,If you want the best randomness in every simulation,Then it's better to change it every timeseed.
常用用法
The common usage of calling random number generation function in ordinary simulation is:
输入 data_in,位宽【a-1:0】,即位宽a,其值范围2^a,Verilog语法即2**a; //2**a表示2的a次方.
So if you need to simulatedata_in的随机输入,通常这样调用:data_in = {$random}%(2**a);
比如:
input [3:0] data_in; //其值范围为2进制0000~1111(即十进制0-15),
data_in = {$random}%(2**4); //即data_in = {$random}%16),Generate a random number in the range of0-15,Perfect coverage of the full range of input data.
总结与参考
- $random与$random()的用法、结果都是一致的
- $random%brange can be generated [ ( -b+1 ) : (b- 1 ) ]内的随机数
- {$random}%brange can be generated [ 0: (b- 1 ) ]内的随机数
参考资料1:IEEE Standard for Verilog Hardware Description Language(IEEE Std 1364-2005)
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