03_ Armv8 instruction set introduction load and store instructions

Github Address ：carloscn/uncle-ben-os at car_lab_01 (github.com)

ARMv8 Instruction set Introduction

• A64 Instruction sets can only run on aarch64

• all A64 Compilation is 32 bits Wide

  • Pay attention to the use of instructions 、 what are you having? limitation
  • A64 The accessible address data is 64 The seat is wide

• A64 Support all uppercase or lowercase

  • ARM Official capital
  • The application uses lowercase

• Register naming

  • Wn Express 32bits Wide register
  • Xn Express 64bits Wide register
  • WZR Express 32 Bit contents are all 0 The register of
  • XZR Express 64 Bit contents are all 0 The register of
  • ...

LDR Instructions

LDR Xd, [Xn, $offset]

• 【 paraphrase 】： take Xn Address stored in register +offset Address offset memory Form a new address , Put the value stored in this address in Xd In the register .[] It has the meaning of getting the value stored in the address .

• 【 Example 】：

  • S1: Use MOV Give orders to 0x80000 Load into X1 register ： MOV x1, 0x80000 （ If it's a number , Instead of #0x80000, Is an address ）
  • S2: Use MOV Give orders to 16 Values loaded into X3 register ： MOV x3, 16
  • S3: Use LDR Instruction read X1 The value stored in the address , Store in X0 in : LDR x0,[x1] , This is not allowed ->LDR x2,[0x80000]
  • S4: Use LDR Instruction read X1 + 8 The value stored in the address , Store in X2 in ：LDR x2,[x1, #8]
  • S5: Use LDR Instruction read (X1 + X3) The value stored in the address , Store in X4 in ： LDR x4,[x1, x3]
  • S6: Use LDR Instruction read (X1+(X3<<3)) The value stored in the address , Store in X5 in ： LDR x5,[x1,x3,lsl #3]

• 【 Be careful 】：

  • The number given without any mark is regarded as the address
  • You need to give immediate scenarios instead of address values , Use #
  • [] It means to take the address value
  • LDR lsl Extension instructions , Only support 1 and 3
  • LDR x2,[x1, #8] x1 Value Can't Is updated to 0x80008

• 【 Variable base model 】：

  • Prevariant basis mode pre-index： Update the offset address first , Post access address
  • Post variable basis mode post-index： First access the memory address , Update the offset address

GDB-Tips

• start-up GDB and QEMU link

  • > gdb-multiarch --tui benos.elf
  • gdb> c
  • gdb> target remote localhost:1234
  • gdb> b ldr_test // Set breakpoints
  • gdb> c
  • gdb> next // next step
  • gdb> info register // Look at all the registers
  • gdb> info x1 x2 x3 // see x1/x2/x3 register
  • gdb> x 0x80000 // Read memory 0x80000 value 32 position
  • gdb> x/xg 0x80000 // Read memory 0x80000 value 64 position