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Introduction to Hisilicon hi3798mv100 set top box chip [easy to understand]
2022-07-02 17:19:00 【Full stack programmer webmaster】
Hello everyone , I meet you again , I'm your friend, Quan Jun .
Hi3798M V100 It is launched by Hisilicon specifically for OTT Cost effective chip solutions for the set-top box Market . In bitstream compatibility 、 Fluency of online video playback 、 Maintain the best user experience in the industry in terms of image quality and overall performance . Integrated quad core high-performance processor 、 built-in NEON, Its processing performance can meet various differentiated business needs , Support Dolby and DTS Audio processing .
Support H.265、H.264、AVS+、MVC、MPEG2、MPEG4、VC-1、VP6、VP8 And other high-definition video decoding and high-performance H.264 code , It can meet the growing multimedia playback 、 Video communication 、 The demand of multi screen transcoding . Integrated multi-core high performance 2D/3D To accelerate the engine , It can provide customers with a smooth human-computer interaction interface and rich game experience . built-in 1 Way Ethernet 、3 road USB2.0、1 road USB3.0 And other rich peripheral interfaces , Provides a flexible connection scheme .
The main features CPU Tetranuclear ARM Cortex A7, Main frequency up to 1.5GHz Integrated multimedia acceleration engine NEON Hardware JAVA Speed up Integrated hardware floating-point coprocessor
3D GPU Tetranuclear Mali450 OpenGL ES 2.0/1.1/1.0 OpenVG 1.1,EGL
Memory control interface DDR3/3L Interface − The maximum capacity 2GB − Memory bit width 32bit − The highest frequency is up to 800MHz/DDR1600 Support NAND Flash − Support SLC/MLC device − Support 8bit Data bit width − The maximum capacity 64GB − Maximum 64bit ECC error correction Support EMMC/tSD/fSD Flash
HiVXE Video decoding H.265 Main [email protected] High-tie H.264 BP/MP/[email protected] level 5.0; Support full HD 3D video (MVC Format ), Support Blu ray navigation AVS Benchmark grade @ Level 6.0,AVS-P16(AVS+) MPEG1 MPEG2 [email protected],[email protected] MPEG4 [email protected],[email protected],GMC MPEG4 Short header format (H.263 baseline) VC-1 [email protected],[email protected],[email protected] VP6/8 Support 4K*[email protected] decode Low delay decoding The biggest support 4 Lu HD decodes at the same time
Picture decoding Full HD JPEG Hardware decoding , Maximum 6400 Mega pixels MJPEG decode , Maximum [email protected] decode PNG Hardware decoding , Maximum 6400 Mega pixels
Video and picture coding H.264 BP/MP/[email protected] 4.2 Video coding ,[email protected] code ,JPEG Hardware coding , Maximum [email protected] code Video coding provides VBR and CBR Pattern Support low delay coding
Audio codec MPEG L1/L2 DRA decode Dolby Digital/Dolby Digital Plus Decoder-Converter Dolby True HD decode DTS/DTS HD Core decode Dolby Digital/ DTS transparent transmission AAC-LC、HE AAC V1/V2 decode APE/FLAC/Ogg/AMR-NB/WB decode G.711(u/a) Audio decoding downmix Handle , Resampling , High dynamic volume control Support high-quality karaoke OK The function supports echo cancellation and G.711(u/a) /AMR-NB/AMR-WB /AAC-LC Audio encoding
Graphics and display processing (Imprex Processing engine ) Hardware superposition function of multi-channel graphics and video input 3 layer OSD 4 Video layer Screen image (Mirror) function Ultra low delay video processing Letter Box and PanScan Full format 3D Video processing and display video 、 Multi level vertical and horizontal scaling of graphics , Stepless zoom All hardware enhanced 2D Graphics acceleration engine Full hardware anti aliasing 、 Anti flicker Coefficient configurable color space conversion Image enhancement 、 Denoising and other functions De-interlace Processing functions Sharpening brightness 、 chroma 、 Contrast 、 Saturation adjustment video DB/DR Handle
Audio and video interface PAL/NTSC/SECAM Standard output , Mandatory conversion 4:3/16:9 Frame ratio , Frame ratio forced conversion 4K*2K/1080p50/1080p30/1080p24/1080i60/1080i50/720p/576p/576i/480p/480i Output 1 Lu Gaoqing and 1 The signpost is clear of homologous or non homologous output 1 road HDMI 1.4a TX with HDCP1.2 Output Analog video interface −1 road CVBS Interface − built-in 1 Road video DAC Audio interface − Left and right channels −SPDIF Interface − Built in audio DAC Output −1 road I2S/PCM Digital audio input / Output −HDMI Audio output
Peripheral interface 1 individual USB3.0 Host Interface 3 individual USB2.0 Host Interface Support USB start-up 、USB debugging 1 individual SDIO3.0 Interface 1 individual 10M/100M Adaptive network port , Integrate FE PHY 1 individual IR Receiver processor , Provide 1 An input interface multiple I2C Interface Multiple UART Interface Multiple groups GPIO Interface Internal integrated power on reset module (POR)
other Built in safe start module , Support anti brush function Support SVP(Secure Video Path) 2 layer PCB Design Varied Boot Pattern Support USB and Flash Empty chip start Integrated dedicated standby processor , Standby power consumption <30mW; Multiple standby modes Adaptive voltage regulation (AVS) And dynamic frequency and voltage regulation (DVFS) And other low-power technologies , Ultra low power design
Hi3798m Chip block diagram
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