Embedded practice ---- based on RT1170 transplant memtester to do SDRAM test (25)

本文主要是通过迁移的思维,记录本人初次使用NXP MCUXpresso SDK API进行BSP开发

1. transplant source

reference:
https://blog.51cto.com/henjay724/2711883
https://github.com/JayHeng/cortex-m-apps
由于RT1170上面没有SDRAM的压力测试工具,So by transplantingmemtester工程至SoC,用于SDRAM的测量.

2. 应用

复制memtesterCurrently up to the project

Add related files to the project

The relevant header file paths will be added：

Add the relevant test code as follows：

diff --git a/SDK_2.8.0_MIMXRT1170-EAR3/boards/easyarm-rt1170-revb/driver_examples/gpio_bootloader/led_output/cm7/gpio_led_output.c b/SDK_2.8.0_MIMXRT1170-EAR3/boards/easyarm-rt1170-revb/driver_examples/gpio_bootloader/led_output/cm7/gpio_led_output.c
index 2a3c5cca..6be89002 100644
--- a/SDK_2.8.0_MIMXRT1170-EAR3/boards/easyarm-rt1170-revb/driver_examples/gpio_bootloader/led_output/cm7/gpio_led_output.c
+++ b/SDK_2.8.0_MIMXRT1170-EAR3/boards/easyarm-rt1170-revb/driver_examples/gpio_bootloader/led_output/cm7/gpio_led_output.c
@@ -12,7 +12,7 @@
 #include "fsl_lpuart.h"
 #include "fsl_flexspi.h"
 #include "fsl_cache.h"
-
+#include "fsl_clock.h"
 
 #include "evkmimxrt1170_flexspi_nor_config.h"
 #include "pin_mux.h"
@@ -20,6 +20,7 @@
 #include "bsp_sdram.h"
 #include "bsp_sdram_test.h"
 #include "app.h"
+#include "memtester.h"
 /******************************************************************************* * Definitions ******************************************************************************/
@@ -42,7 +43,17 @@ extern void dump_build_info(void);
 /******************************************************************************* * Variables ******************************************************************************/
+typedef struct _semc_test_config {
    
+  uint32_t baseAddr;
+  uint32_t testSize;
+  uint32_t loopNum;
+  uint32_t dramFreq;
+  uint32_t enableCache;
+} semc_test_config_t;
+
+int fail_stop = 1;
 
+char memsuffix = 'B';
 /******************************************************************************* * Code ******************************************************************************/
@@ -478,6 +489,30 @@ int main(void)
     SEMC_SDRAMReadWrite16Bit();
     /* 8Bit data read and write. */
     SEMC_SDRAMReadWrite8Bit();
+
+    semc_test_config_t testConfig;
+    testConfig.baseAddr = 0x80000000;
+    testConfig.testSize = 32 * 1024 * 1024;
+    testConfig.loopNum = 1;
+    testConfig.dramFreq = CLOCK_GetRootClockFreq(kCLOCK_Root_Semc);
+    testConfig.enableCache = 0;
+    
+    if (!testConfig.enableCache) {
    
+        /* Disable D cache */
+        SCB_DisableDCache();
+    }
+
+    PRINTF("\r\n########## Print out from target board ##########\r\n");
+    PRINTF("\r\nSDRAM r/w test settings:\r\n");
+    PRINTF(" Base Addr: 0x%x;\r\n", testConfig.baseAddr);
+    PRINTF(" Test Size: %d Bytes;\r\n", testConfig.testSize);
+    PRINTF(" Test Loop: %d;\r\n", testConfig.loopNum);    
+    PRINTF(" SDRAM Freq: %d Hz;\r\n",testConfig.dramFreq);
+    PRINTF(" Enable Cache: %d;\r\n\r\n", testConfig.enableCache);
+
+    /* Run memory stress test: 64KByte, loop=1, page_size = 1kbyte */
+    memtester_main(testConfig.baseAddr, testConfig.testSize, &memsuffix, testConfig.loopNum, (1*1024));		
+		
 		#endif // BSP_SDRAM_TEST
 		
 		

Test diary：

15:42:10:568--- RT1170 bootloader bootup   
15:42:10:568---
15:42:10:569--- UTS_VERSION: 2022/05/30-15:41:50
15:42:10:569---
15:42:10:569--- RT1170FW_BOOT_COMPILE_TIME: 2022/05/30-15:41:50
15:42:10:569---
15:42:10:580--- RT1170FW_BOOT_COMPILE_BY: Administrator
15:42:10:580---
15:42:10:581--- RT1170FW_BOOT_COMPILER: Keil compiler
15:42:10:581---
15:42:10:591--- RT1170FW_BOOT_VERSION: e93c445c301351f048d71f5c349c45f0072c3e0a
15:42:10:591---
15:42:10:592--- RT1170FW_BOOT_HARDWARE_BOARD: rt1170 mcu
15:42:10:592---
15:42:10:592---FLEXSPI example started!
15:42:10:592---Vendor ID: 0x17
15:42:10:599---Erasing Serial NOR over FlexSPI...
15:42:10:650---Erase data - successfully. 
15:42:10:650---Program data - successfully. 
15:42:10:650---
15:42:10:659--- SEMC SDRAM Write 32 bit Start, Start Address 0x80000000, Data Length 8388607 !
15:42:10:720---
15:42:10:720--- SEMC SDRAM Read 32 bit Data Start, Start Address 0x80000000, Data Length 8388607 !
15:42:10:978---
15:42:10:978--- SEMC SDRAM Write 32 bit Start, Start Address 0x80000001, Data Length 8388607 !
15:42:11:043---
15:42:11:043--- SEMC SDRAM Read 32 bit Data Start, Start Address 0x80000001, Data Length 8388607 !
15:42:11:327---
15:42:11:328--- SEMC SDRAM Write 32 bit Start, Start Address 0x80000002, Data Length 8388607 !
15:42:11:439---
15:42:11:439--- SEMC SDRAM Read 32 bit Data Start, Start Address 0x80000002, Data Length 8388607 !
15:42:11:722---
15:42:11:723--- SEMC SDRAM Write 32 bit Start, Start Address 0x80000003, Data Length 8388607 !
15:42:11:787---
15:42:11:788--- SEMC SDRAM Read 32 bit Data Start, Start Address 0x80000003, Data Length 8388607 !
15:42:12:070---
15:42:12:071--- SEMC SDRAM 32 bit Data Write and Read Compare Succeed!
15:42:12:071---
15:42:12:079--- SEMC SDRAM Write 16 bit Start, Start Address 0x80000000, Data Length 16777215 !
15:42:12:188---
15:42:12:188--- SEMC SDRAM Read 16 bit Data Start, Start Address 0x80000000, Data Length 16777215 !
15:42:12:479---
15:42:12:479--- SEMC SDRAM Write 16 bit Start, Start Address 0x80000001, Data Length 16777215 !
15:42:12:590---
15:42:12:590--- SEMC SDRAM Read 16 bit Data Start, Start Address 0x80000001, Data Length 16777215 !
15:42:12:915---
15:42:12:915--- SEMC SDRAM 16 bit Data Write and Read Compare Succeed!
15:42:12:915---
15:42:12:924--- SEMC SDRAM Memory 8 bit Write Start, Start Address 0x80000000, Data Length 33554432 !
15:42:13:034---
15:42:13:034--- SEMC SDRAM Read 8 bit Data Start, Start Address 0x80000000, Data Length 33554432 !
15:42:13:410---
15:42:13:411--- SEMC SDRAM 8 bit Data Write and Read Compare Succeed!
15:42:13:411---
15:42:13:411---########## Print out from target board ##########
15:42:13:411---
15:42:13:424---SDRAM r/w test settings:
15:42:13:424---      Base Addr: 0x80000000;
15:42:13:425---      Test Size: 33554432 Bytes;
15:42:13:425---      Test Loop: 1;
15:42:13:434---      SDRAM Freq: 163862064 Hz;
15:42:13:435---      Enable Cache: 0;
15:42:13:435---
15:42:13:435---memtester version 4.5.0 (32-bit)
15:42:13:435---Copyright (C) 2001-2020 Charles Cazabon.
15:42:13:449---Licensed under the GNU General Public License version 2 (only).
15:42:13:449---
15:42:13:449---want 32MB (33554432 bytes)
15:42:13:449---Loop 1/1:
15:42:37:926---  Stuck Address: ok
15:42:40:359---  Random Value: ok
15:42:44:230---  Compare XOR: ok
15:42:48:102---  Compare SUB: ok
15:42:51:973---  Compare MUL: ok
15:42:55:863---  Compare DIV: ok
15:42:59:736---  Compare OR: ok
15:43:03:603---  Compare AND: ok
15:43:06:187---  Sequential Increment: ok
15:45:43:992---  Solid Bits: ok
15:53:53:557---  Block Sequential: ok
15:55:55:904---  Checkerboard: ok
15:58:33:710---  Bit Spread: ok
16:09:04:552---  Bit Flip: ok
16:11:06:895---  Walking Ones: ok
16:13:09:239---  Walking Zeroes: ok
16:13:15:126---  8-bit Writes: ok
16:13:20:738---  16-bit Writes: ok

3. 总结

有比较过memtester 4.5.1Ported version with referencememtester 4.5.0 Differences between related documents

1. 主要是printf函数的移植.
2. Mainly to note out the judgment of cross-platform code.
3. 去除一些flush exit等函数.
4. 找到对应的main入口函数,重写mian函数,and add related parametersmemtester_main.

Hope to help readers.
欢迎订阅
“嵌入式实操”一个分享开发实践经验的地方.
文章会同时发布到我的 CSDN主页、今日头条号 平台上.