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DMA use of stm32
2022-07-06 04:35:00 【Struggling little Yin】
STM32 And DMA Use
The following are memory to memory and memory to peripherals ( A serial port ) Demonstrate the use of
Learn From Who said that?Jiangjiang STM32
One 、DMA brief introduction
Direct memory access (DMA) Used to provide high-speed data transfer between peripheral and memory or between memory and memory . need not CPU intervention , Data can be obtained by DMA Moving fast , This saves CPU To do other operations .
Two DMA The controller has 12 Channels (DMA1 Yes 7 Channels ,DMA2 Yes 5 Channels ), Each channel is dedicated to managing requests for memory access from one or more peripherals . There is also an arbiter to coordinate the various DMA The priority of the claim .
Two 、DMA The main features
12 A separate configurable channel ( request ):DMA1 Yes 7 Channels ,DMA2 Yes 5 Channels
● Each channel is directly connected to dedicated hardware DMA request , Each channel also supports software triggering . These functions are configured by software .
● In the same DMA On module , The priority between multiple requests can be set by software programming ( There are four levels : Very high 、 high 、 Medium and low ), When the priority settings are equal, it is determined by the hardware ( request 0 Priority over request 1, And so on ) .
● Transmission width of independent data source and target data area ( byte 、 Half word 、 Whole word ), Simulate the process of packing and unpacking . The source and destination addresses must be aligned according to the data transmission width .
● Buffer management supporting loops
● Every channel has 3 Event markers (DMA Semi transmission 、DMA The transmission is complete and DMA Transmission error ), this 3 An event flag logic or a separate interrupt request .
● Memory and memory to memory transfer
● Peripherals and memory 、 Transfer between memory and peripherals
● Flash memory 、SRAM、 Peripheral SRAM、APB1、APB2 and AHB Peripherals can be used as the source and target of access .
● The number of programmable data transfers : The maximum is 65535
3、 ... and 、 Functional block diagram
Four 、DMA passageway
Each channel can be executed between a peripheral register with a fixed address and a memory address DMA transmission .
DMA The amount of data transmitted is programmable , Up to 65535.
A register containing the number of data items to be transferred , Decrements after each transmission .
4.1 Programmable amount of data
The amount of data transmitted by peripherals and memory can be through DMA_CCRx In register PSIZE and MSIZE Bit programming .
4.24.2 Pointer increment
4.34.3 The configuration process
Here is the configuration DMA passageway x The process of (x Represents the channel number ):
- stay DMA_CPARx Register sets the address of the peripheral register . When a peripheral data transmission request occurs , This address will be the source or destination of data transmission .2. stay DMA_CMARx Register sets the address of the data memory . When a peripheral data transmission request occurs , The transmitted data will be read from or written to this address .3. stay DMA_CNDTRx Set the amount of data to be transmitted in the register . After each data transmission , This number decreases .4. stay DMA_CCRx The register of PL[1:0] Bit to set the priority of the channel .5. stay DMA_CCRx Set the direction of data transmission in the register 、 Circulation patterns 、 Incremental mode of peripherals and memory 、 Data width of peripherals and memory 、 An interrupt occurs when half of the transmission is completed or when the transmission is completed .6. Set up DMA_CCRx The register of ENABLE position , Start the channel .
Once it's started DMA passageway , It can respond to the of peripherals connected to the channel DMA request .
When half the data is transmitted , Half transmission flag (HTIF) Be placed 1, When it is set to allow half transmission break (HTIE) when , An interrupt request will be generated . At the end of data transmission , Transmission completion flag (TCIF) Be placed 1, When the interrupt bit is set to allow the transmission to complete (TCIE) when , An interrupt request will be generated .
4.4 Circulation patterns
4.5 Memory to memory mode
5、 ... and 、DMA Handle
After an event , Peripherals to DMA The controller sends a request signal .DMA The controller processes the request according to the priority of the channel . When DMA When the controller starts accessing the requested peripheral ,DMA The controller immediately sends it a reply signal . When from DMA When the controller gets the reply signal , The peripheral immediately releases its request . Once the peripheral releases the request ,DMA The controller cancels the reply signal at the same time . If there are more requests , The peripheral can start the next cycle .
All in all , Every time DMA Transmitted by 3 It consists of two operations :
● From the peripheral data register or from the current peripheral / The memory address indicated by the memory address register takes data , The start address for the first transmission is DMA_CPARx or DMA_CMARx Register specifies the peripheral base address or memory unit .
● Save data to the peripheral data register or the current peripheral / The memory address indicated by the memory address register , The start address for the first transmission is DMA_CPARx or DMA_CMARx Register specifies the peripheral base address or memory unit .
● Do it once DMA_CNDTRx Decrement of registers , This register contains the number of outstanding operations
6、 ... and 、DMA interrupt
7、 ... and 、DMA Request image
8、 ... and 、DMA register
Code demonstration
dma.h
#ifndef _DMA_H_
#define _DMA_H_
#include "stm32f10x.h"
void DMA_MTM_Init(void);
uint8_t Buffercmp(const uint32_t * pBuffer1,uint32_t *pBuffer2,uint32_t BufferLength);
void DMA_USART_Init(void);
#define USART_DR_ADDR (USART1_BASE + 0x04)
#define BUFFER_SIZE 4
#define Send_SIZE 50
#endif
dma.c
#include "dma.h"
const uint32_t SRC_Buffer[BUFFER_SIZE] = {
0x00000001,0x10101010,0x00111010,0x00111101};
uint32_t DES_Buffer[BUFFER_SIZE];
uint8_t Send_Buffer[Send_SIZE];
void DMA_MTM_Init(void)
{
DMA_InitTypeDef DMA_InitStructure;
// Clock configuration
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);
//DMA Structure configuration
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) SRC_Buffer; // Peripheral address
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) DES_Buffer; // Memory address
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; // Transmission direction
DMA_InitStructure.DMA_BufferSize = BUFFER_SIZE; // Number of transmissions
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;// Peripheral address increment mode
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; // Memory address increment mode
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; // Memory data width
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;// Peripheral data width
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; // Mode selection
DMA_InitStructure.DMA_Priority = DMA_Priority_High; // Channel priority
DMA_InitStructure.DMA_M2M = DMA_M2M_Enable; // Memory to memory mode
DMA_Init(DMA1_Channel6,&DMA_InitStructure);
DMA_ClearFlag(DMA1_FLAG_TC6);
DMA_Cmd(DMA1_Channel6,ENABLE);
}
uint8_t Buffercmp(const uint32_t * pBuffer1,uint32_t *pBuffer2,uint32_t BufferLength)
{
while(BufferLength--) // The data length decreases
{
if(*pBuffer1 != *pBuffer2) // Determine whether the two data sources are equal
{
return 0; // It's not equal return 0
}
pBuffer1++; // Increment two source address pointers
pBuffer2++;
}
return 1; // complete And equal
}
void DMA_USART_Init(void)
{
DMA_InitTypeDef DMA_InitStructure;
// Clock configuration
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1,ENABLE);
// Structure configuration
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)Send_Buffer;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)USART_DR_ADDR;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = Send_SIZE;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel4,&DMA_InitStructure);
DMA_ClearFlag(DMA1_FLAG_TC4);
DMA_Cmd(DMA1_Channel4,ENABLE);
}
main.c
#include "stm32f10x.h"
#include "led.h"
#include "dma.h"
#include "SysTick.h"
#include "usart.h"
extern const uint32_t SRC_Buffer[BUFFER_SIZE] ;
extern uint32_t DES_Buffer[BUFFER_SIZE];
extern uint8_t Send_Buffer[Send_SIZE];
void Delay(unsigned int t)
{
while(t--);
}
int main(void)
{
uint16_t i = 0;
Usart_Init();
DMA_USART_Init();
USART_DMACmd(USART1,USART_DMAReq_Tx,ENABLE);
// Open the serial port assistant to observe the data
for(i = 0; i< Send_SIZE;i++)
{
Send_Buffer[i] = '0';
}
/* uint8_t status = 0; DMA_MTM_Init(); Led_Init(); status = Buffercmp(SRC_Buffer,DES_Buffer,BUFFER_SIZE); if(status == 0) { GPIO_SetBits(GPIOC,GPIO_Pin_13); } else { GPIO_ResetBits(GPIOC,GPIO_Pin_13); } */
while(1)
{
}
}
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