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50MHz generation time

2022-07-08 01:00:00 eachanm

50Mhz The corresponding count is 0.02us, That is to say 20 nanosecond , Count to 1us want 50 Count , Others can be calculated by yourself , The following is the generation of 1us、1ms、1s Methods

module count_time
#(
    parameter CNT_1US_MAX = 6'd49,
    parameter CNT_1MS_MAX = 10'd999,
    parameter CNT_1S_MAX = 10'd999
)
(
    input wire sys_clk,
    input wire sys_rst_n,
    output reg  led_out
);
//50Mhz by 20ns

reg [9:0]cnt_1s;     // Give Way 1ms Count to 1000
reg [9:0]cnt_1ms;    // Give Way 1us Count to 1000
reg [5:0]cnt_1us;  // Count to 50
reg cnt_en;
//1us
[email protected] (posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)
        cnt_1us <= 6'd0;
    else if(cnt_1us == CNT_1US_MAX)
        cnt_1us <= 6'd0;
    else 
        cnt_1us <= cnt_1us +6'd1;
 //1ms       
[email protected] (posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)
        cnt_1ms <= 10'd0;
    else if(cnt_1ms == CNT_1MS_MAX && cnt_1us == CNT_1US_MAX)
        cnt_1ms <= 10'd0;
    else if(cnt_1us == CNT_1US_MAX)
        cnt_1ms <= cnt_1ms +10'd1;
    else
        cnt_1ms <= cnt_1ms;
 //1s      
[email protected] (posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)
        cnt_1s <= 10'd0;
    else if(cnt_1s == CNT_1S_MAX && cnt_1ms == CNT_1MS_MAX && cnt_1us == CNT_1US_MAX)
        cnt_1s <= 10'd0;
    else if(cnt_1us == CNT_1US_MAX && cnt_1ms == CNT_1MS_MAX )
        cnt_1s <= cnt_1s + 10'd1;
    else
        cnt_1s <= cnt_1s;
        
// Control state         
[email protected] (posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)
        cnt_en <= 1'b0;
    else if(cnt_1s == CNT_1S_MAX && cnt_1ms == CNT_1MS_MAX && cnt_1us == CNT_1US_MAX)
        cnt_en <= ~cnt_en;
    else 
        cnt_en <= cnt_en;
        
[email protected] (posedge sys_clk or negedge sys_rst_n)
    if(sys_rst_n == 1'b0)
        led_out <= 1'b1;
    else if((cnt_en == 1'b0) && (cnt_1ms <= cnt_1s) 
            || (cnt_en == 1'b1) && (cnt_1ms >= cnt_1s))
        led_out <= 1'b0;
    else 
        led_out <= 1'b1;
endmodule


Clock cycle corresponding to clock frequency  
5MHz 200ns

10MHz 100ns

20MHz 50ns

25MHz 40ns

33MHz 30ns

40MHz 25ns

50MHz 20ns

66MHz 15ns

80MHz 12ns

100MHz 10ns

120MHz 8.3ns

133MHz 7.5ns

166MHz 6.0ns

200MHz 5.0ns

250MHz 4.0ns

300MHz 3.3ns

333MHz 3.0ns

400MHz 2.5ns

500MHz 2.0ns

800MHz 1.2ns

1GHz 1.0ns

4GHz 0.25ns

Common unit conversion

1GHz=1000MHz,1MHz=1000kHz,1kHz=1000Hz
1s=1000ms,1 ms=1000μs,1μs=1000ns
s( second )、ms( millisecond )、μs( Microsecond )、ns( nanosecond )

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