LDO voltage stabilizing chip - internal block diagram and selection parameters

In electronic design , We often need to use different DC voltages to power different devices , One of the most used is through LDO Voltage stabilizing chip to achieve different DC voltage output , Because of the low cost 、 Good performance , And it's easy to use , Give Way LDO More and more voltage stabilizing chips are used , Almost every electronic product has its figure . Say it works , Because in ordinary design , Just add the appropriate input voltage , And several filter capacitors can get the desired output voltage , It's simple , However, because of this seemingly simple usage , Let many engineers with different technical levels not combine their own specific design conditions , Directly copy other people's designs or casually find an application diagram recommended by the chip manufacturer to use , Do not pay attention to the working principle and performance characteristics of the device , Although the output voltage can also be , And it works , But there are many design hidden dangers , There will be problems at any time . Let's put our minds right today , Have a new and comprehensive understanding LDO Voltage stabilizing chip .

LDO Definition of voltage stabilizing chip ？

LDO namely low dropout regulator, It is a kind of low pressure difference 、 linear 、 pressure regulator .

“ Low pressure difference ”： The input and output voltage drop is relatively low , For example, the input 3.3V, The output can reach 3.2V.

“ linear ”：LDO Inside MOS The tube works in the linear resistance range , This sentence is very important , Understanding is also important .

“ pressure regulator ” Illustrates the LDO The purpose of is to stabilize the voltage of the power supply .

That we use a lot 7805、1117 Series are commonly used LDO Voltage stabilizing chip , Actually 7805 This chip dropout Don't do it with high voltage , Of course 1117 series dropout The voltage is not much smaller , But because of its low cost 、 Sex can use , It is still very popular . At present, the low differential pressure can be less than 200mV, It is very suitable for low voltage product design . What I want to emphasize here is LDO Voltage stabilizing chip is different from DC-DC Voltage stabilizing chip ,DC-DC Voltage stabilizing chip focuses on AC processing of internal DC input , Working methods and LDO Voltage stabilizing chips are completely different , Similar to switching power supply .

LDO Why is the output stable ？

We all know LDO After the voltage stabilizing chip builds the circuit, the output is the value we want and is stable , Have you thought about it , Why is the output voltage stable ？ Here is a typical LDO Principle block diagram to analyze .

LDO Typical internal principle block diagram

It can be seen in the above figure LDO chip , Inside is a P-MOS tube + An operational amplifier +2 Resistance +1 A reference voltage source .

therefore LDO Core architecture ：P-MOS+ Operational release + Reference voltage source , The adjustment is achieved through the resistance already set inside the chip P-MOS Output , And get the output voltage of the chip . The output voltage is divided by the feedback resistor to FB Pin , When the output voltage is higher than the set value , The internal circuit will change the driving voltage , Make the conduction pressure drop of the pipe increase , Thus reducing the output voltage . When the output voltage is lower than the set value , The internal circuit will change the driving voltage , Make the pipe conduction pressure drop decrease , So as to improve the output voltage , Form a perfect closed-loop negative feedback loop , Ensure that the output voltage is relatively stable at a certain value or range when working with load .

LDO Important performance parameters of voltage stabilizing chip

PSRR( Power supply voltage rejection ratio )

PSRR It's a lot of LDO Common technical requirements in the data book of voltage stabilizing chip , Some manuals may not list this parameter . A certain frequency is specified AC Components from input to LDO The attenuation of the output , Generally speaking , Refer to LDO Suppression effect of output on input ripple noise , This is also on many occasions DC/DC Add another one to the rear stage LDO Why （ In particular, it is followed by analog sensors or ADC/DAC when ）. high PSRR Of LDO The suppression effect of output ripple is still obvious . The following figure is given by a device manufacturer PSRR Characteristics of figure . How to determine LDO Of PSRR Are the parameters sufficient , A simple example , hypothesis LDO Ahead DC/DC The switching frequency is 100khz, Through this device PSRR The characteristic diagram shows that ,100khz Situated PSRR yes 50dB, Suppose the front end DC/DC Ripple size 100mv, that LDO After the ripple =100mv/10(50/20)=0.3mv, Visible height PSRR Characteristic LDO How important a voltage stabilizing chip is .

some LDO chip PSRR Characteristics of figure

Noise（ Noise performance ）

differ PSRR, Noise means LDO Self generated noise signal , Low noise LDO Voltage stabilizing chip can reduce LDO Additional noise generated , The output voltage is purer , Generally, the calculated value of noise is the effective value (rms), It can also be used. peak to peak To analyze .

some LDO Chip noise characteristic diagram

Low Dropout Voltage（ Low pressure drop ）

This parameter is also mentioned at the beginning of the above , Designing circuits, for example, requires 6v turn 5v when , Need to keep Low Dropout Voltage Parameters <1 v. Outstanding performance LDO Generally, the pressure drop is very low ,Vdropout It can be done <200mV.

Transient response( Dynamic performance )

Some applications , The load changes violently , Then this parameter is very important , In addition to ensuring dynamic performance by increasing output capacitance , Also try to choose the one with good dynamic performance LDO chip .

some LDO Working diagram of chip dynamic performance

Thermal（ Temperature performance ）

Everybody knows LDO Work efficiency is relatively high DC-DC Voltage stabilizing chip is very low , How do you check one LDO Is it appropriate ？ First, calculate the power consumption Pd=（Vin-Vout）Iout , Secondly, calculate the temperature rise , The general chip manual will explain the calculation formula of temperature performance and temperature rise , In a word , Can't because LDO When the chip works with load, it burns out within the specified working temperature range . What we want to emphasize here is the different encapsulation , Its LDO The temperature performance of the chip is different .

IQ（ Static current ）

General battery powered occasions have higher requirements for quiescent current , commonly LDO The quiescent current of the chip is inversely related to other performance of the chip , Such as low noise , High supply voltage rejection ratio , Good dynamic performance LDO The static current is too large . low IQ Of LDO Well done ,<100nA.

How to ？ A seemingly simple LDO I didn't expect that there would be so many performance indicators to consider , In good design and exquisite design , Selection of each component , Location , What's the value , What model , That is important and necessary , All of them are scientific , Do not replace at will . Reference to the original ：《LDO Voltage stabilizing chip , An important device that is easy to be ignored 》