当前位置:网站首页>The 10th Blue Bridge Cup single chip microcomputer provincial competition
The 10th Blue Bridge Cup single chip microcomputer provincial competition
2022-07-02 03:38:00 【Super 561】
main.c
#include <STC15F2K60S2.H>
#include <IIC.H>
void Timer2Init() //1 millisecond @12.000MHz
{
AUXR &= 0xFB; // Timer clock 12T Pattern
T2L = 0x18; // Set initial value of timing
T2H = 0xFC; // Set initial value of timing
AUXR |= 0x10; // Timer 2 Start timing
IE2|=0X04;
EA=1;
}
bit dianya_flag;
bit led_flag=1;
unsigned int dianya;
unsigned char ad;
unsigned int ad_count;
unsigned char ad_read(unsigned char add)
{
unsigned char date;
IIC_Start();
IIC_SendByte(0x90);
IIC_WaitAck();
IIC_SendByte(add);
IIC_WaitAck();
IIC_Start();
IIC_SendByte(0x91);
IIC_WaitAck();
date=IIC_RecByte();
IIC_SendAck(1);
IIC_Stop();
return date;
}
unsigned int da_count;
void da(unsigned char date)
{
IIC_Start();
IIC_SendByte(0x90);
IIC_WaitAck();
IIC_SendByte(0x40);
IIC_WaitAck();
IIC_SendByte(date);
IIC_WaitAck();
IIC_Stop();
}
void da_process()
{
if(da_count>10)
{
da_count=0;
if(dianya_flag)
{
da(ad);
}
else
{
da(102);
}
}
}
void ad_process()
{
if(ad_count>10)
{
ad_count=0;
ad=ad_read(0x03);
dianya=ad/51.0f*100;
}
}
unsigned int ne555_count;
unsigned int freq_ne555;
void Init_ne555()
{
TMOD|=0X05;
TH0=0;
TL0=0;
TR0=1;
}
void ne555_process()
{
ne555_count++;
if(ne555_count>1000)
{
freq_ne555=(TH0<<8)|TL0;
TH0=0;
TL0=0;
ne555_count=0;
}
}
void Device_ctrl(unsigned char p2date,unsigned char p0date)
{
P0=p0date;
P2=P2&0x1f|p2date;
P2&=0X1F;
}
unsigned int smg_count;
unsigned char smg_display[8];
unsigned char smg_du[]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,0x7D,0x07,0x7F,0x6F};
bit displaymode=1;
bit smg_flag=1;
void smg_show()
{
unsigned int i;
Device_ctrl(0xc0,0);
Device_ctrl(0xe0,~smg_display[i]);
Device_ctrl(0xc0,0x01<<i);
i=(i+1)%8;
}
void smg_process()
{
if(smg_count>3)
{
smg_count=0;
if(smg_flag)
{
if(displaymode)
{
smg_display[0]=0x3E;
smg_display[1]=0x00;
smg_display[2]=0x00;
smg_display[3]=0x00;
smg_display[4]=0x00;
smg_display[5]=smg_du[dianya/100]|0x80;
smg_display[6]=smg_du[dianya/10%10];
smg_display[7]=smg_du[dianya%10];
}
else
{
smg_display[0]=0x71;
smg_display[1]=0x00;
if(freq_ne555>99999)
{
smg_display[2]=smg_du[freq_ne555/100000];
smg_display[3]=smg_du[freq_ne555/10000%10];
smg_display[4]=smg_du[freq_ne555/1000%10];
smg_display[5]=smg_du[freq_ne555/100%10];
smg_display[6]=smg_du[freq_ne555/10%10];
smg_display[7]=smg_du[freq_ne555%10];
}
else if(freq_ne555>9999)
{
smg_display[2]=0x00;
smg_display[3]=smg_du[freq_ne555/10000%10];
smg_display[4]=smg_du[freq_ne555/1000%10];
smg_display[5]=smg_du[freq_ne555/100%10];
smg_display[6]=smg_du[freq_ne555/10%10];
smg_display[7]=smg_du[freq_ne555%10];
}
else if(freq_ne555>999)
{
smg_display[2]=0x00;
smg_display[3]=0x00;
smg_display[4]=smg_du[freq_ne555/1000%10];
smg_display[5]=smg_du[freq_ne555/100%10];
smg_display[6]=smg_du[freq_ne555/10%10];
smg_display[7]=smg_du[freq_ne555%10];
}
else if(freq_ne555>99)
{
smg_display[2]=0x00;
smg_display[3]=0x00;
smg_display[4]=0x00;
smg_display[5]=smg_du[freq_ne555/100%10];
smg_display[6]=smg_du[freq_ne555/10%10];
smg_display[7]=smg_du[freq_ne555%10];
}
else if(freq_ne555>9)
{
smg_display[2]=0x00;
smg_display[3]=0x00;
smg_display[4]=0x00;
smg_display[5]=0x00;
smg_display[6]=smg_du[freq_ne555/10%10];
smg_display[7]=smg_du[freq_ne555%10];
}
else
{
smg_display[2]=0x00;
smg_display[3]=0x00;
smg_display[4]=0x00;
smg_display[5]=0x00;
smg_display[6]=0x00;
smg_display[7]=smg_du[freq_ne555%10];
}
}
}
else
{
smg_display[0]=0x00;
smg_display[1]=0x00;
smg_display[2]=0x00;
smg_display[3]=0x00;
smg_display[4]=0x00;
smg_display[5]=0x00;
smg_display[6]=0x00;
smg_display[7]=0x00;
}
}
}
unsigned char Trig;
unsigned char Cont;
unsigned int key_count;
void key_btn()
{
unsigned char readdate=P3^0XFF;
Trig=readdate&(Cont^readdate);
Cont=readdate;
}
void key_process()
{
if(key_count>=10)
{
key_count=0;
key_btn();
if(Trig==0x08)//s4
{
displaymode=~displaymode;
}
if(Trig==0x04)//s5
{
dianya_flag=~dianya_flag;
}
if(Trig==0x02)//s6
{
led_flag=~led_flag;
}
if(Trig==0x01)//s7
{
smg_flag=~smg_flag;
}
}
}
unsigned int led_count;
unsigned char led_ctrl=0xff;
void led_process()
{
if(led_count>10)
{
led_count=0;
if(led_flag)
{
if(displaymode)
{
led_ctrl&=~0x01;
led_ctrl|=0x02;
if(dianya<150)
{
led_ctrl|=0x04;
}
else if(dianya<250)
{
led_ctrl&=~0x04;
}
else if(dianya<350)
{
led_ctrl|=0x04;
}
else
{
led_ctrl&=~0x04;
}
}
else
{
led_ctrl&=~0x02;
led_ctrl|=0x01;
if(freq_ne555<1000)
{
led_ctrl|=0x08;
}
else if(freq_ne555<5000)
{
led_ctrl&=~0x08;
}
else if(freq_ne555<10000)
{
led_ctrl|=0x08;
}
else
{
led_ctrl&=~0x08;
}
}
if(dianya_flag)
{
led_ctrl&=~0x08;
}
else
{
led_ctrl|=0x08;
}
}
else
{
led_ctrl=0xff;
}
Device_ctrl(0x80,led_ctrl);
}
}
void main()
{
Timer2Init();
Init_ne555();
Device_ctrl(0xa0,0x00);
Device_ctrl(0x80,0xff);
while(1)
{
smg_process();
ad_process();
da_process();
key_process();
led_process();
}
}
void timer2service() interrupt 12
{
smg_count++;
ad_count++;
da_count++;
key_count++;
led_count++;
smg_show();
ne555_process();
}
iic.c
#include "iic.h"
#define DELAY_TIME 5
//I2C Bus internal delay function
void IIC_Delay(unsigned char i)
{
do{_nop_();}
while(i--);
}
//I2C Bus start signal
void IIC_Start(void)
{
SDA = 1;
SCL = 1;
IIC_Delay(DELAY_TIME);
SDA = 0;
IIC_Delay(DELAY_TIME);
SCL = 0;
}
//I2C Bus stop signal
void IIC_Stop(void)
{
SDA = 0;
SCL = 1;
IIC_Delay(DELAY_TIME);
SDA = 1;
IIC_Delay(DELAY_TIME);
}
// Send a reply or non reply signal
void IIC_SendAck(bit ackbit)
{
SCL = 0;
SDA = ackbit;
IIC_Delay(DELAY_TIME);
SCL = 1;
IIC_Delay(DELAY_TIME);
SCL = 0;
SDA = 1;
IIC_Delay(DELAY_TIME);
}
// Waiting for an answer
bit IIC_WaitAck(void)
{
bit ackbit;
SCL = 1;
IIC_Delay(DELAY_TIME);
ackbit = SDA;
SCL = 0;
IIC_Delay(DELAY_TIME);
return ackbit;
}
//I2C The bus sends a byte of data
void IIC_SendByte(unsigned char byt)
{
unsigned char i;
for(i=0; i<8; i++)
{
SCL = 0;
IIC_Delay(DELAY_TIME);
if(byt & 0x80) SDA = 1;
else SDA = 0;
IIC_Delay(DELAY_TIME);
SCL = 1;
byt <<= 1;
IIC_Delay(DELAY_TIME);
}
SCL = 0;
}
//I2C The bus receives a byte of data
unsigned char IIC_RecByte(void)
{
unsigned char i, da;
for(i=0; i<8; i++)
{
SCL = 1;
IIC_Delay(DELAY_TIME);
da <<= 1;
if(SDA) da |= 1;
SCL = 0;
IIC_Delay(DELAY_TIME);
}
return da;
}
iic.h
#ifndef _IIC_H
#define _IIC_H
#include <STC15F2K60S2.H>
#include "intrins.h"
sbit SDA = P2^1;
sbit SCL = P2^0;
void IIC_Start(void);
void IIC_Stop(void);
bit IIC_WaitAck(void);
void IIC_SendAck(bit ackbit);
void IIC_SendByte(unsigned char byt);
unsigned char IIC_RecByte(void);
#endif
边栏推荐
- Global and Chinese market of handheld ultrasonic scanners 2022-2028: Research Report on technology, participants, trends, market size and share
- Screenshot literacy tool download and use
- Network connection mode of QT
- Uniapp uses canvas to generate posters and save them locally
- Grpc quick practice
- [database]jdbc
- JIT deep analysis
- Oracle common SQL
- Global and Chinese markets for electronic laryngoscope systems 2022-2028: Research Report on technology, participants, trends, market size and share
- Class design basis and advanced
猜你喜欢
Large screen visualization from bronze to the advanced king, you only need a "component reuse"!
Failed to upgrade schema, error: “file does not exist
跳出舒适区,5年点工转型自动化测试工程师,我只用了3个月时间
What do you know about stock selling skills and principles
《MATLAB 神經網絡43個案例分析》:第42章 並行運算與神經網絡——基於CPU/GPU的並行神經網絡運算
蓝桥杯单片机省赛第五届
[mv-3d] - multi view 3D target detection network
蓝桥杯单片机省赛第十一届第二场
This article describes the step-by-step process of starting the NFT platform project
Continuous assignment of Verilog procedure
随机推荐
蓝桥杯单片机省赛第六届
PHP array processing
【直播回顾】战码先锋首期8节直播完美落幕,下期敬请期待!
What is the logical structure of database file
KL divergence is a valuable article
Generate random numbers that obey normal distribution
数据库文件逻辑结构形式指的是什么
Analyse de 43 cas de réseaux neuronaux MATLAB: Chapitre 42 opérations parallèles et réseaux neuronaux - - opérations parallèles de réseaux neuronaux basées sur CPU / GPU
Discrimination between sap Hana, s/4hana and SAP BTP
近段时间天气暴热,所以采集北上广深去年天气数据,制作可视化图看下
知物由学 | 自监督学习助力内容风控效果提升
一天上手Aurora 8B/10B IP核(5)----从Framing接口的官方例程学起
In depth analysis of C language - variable error prone knowledge points # dry goods inventory #
JIT deep analysis
h5中的页面显示隐藏执行事件
Verilog timing control
Unity脚本的基础语法(6)-特定文件夹
蓝桥杯单片机第四届省赛
【DesignMode】建造者模式(Builder model)
Grpc快速实践