Armv8-a programming guide MMU (3)

2 Separation of kernel and application virtual address space

         Operating systems usually have multiple applications or tasks running asynchronously . Each application has its own unique conversion table and the kernel switches from one conversion table to another , This is part of context switching between the two tasks . however , Most memory systems are only used by the kernel and have fixed virtual to physical address mappings , Conversion table entries are rarely modified .ARMv8 The architecture provides some features to effectively handle this requirement .

         The base address of the conversion table has TTBR0_EL1 and TTBR1_EL1 Appoint . When VA All the high positions are 0 when , choice TTBR0 Conversion table to , When VA The high position of the 1 when , choice TTBR1 Selected conversion table . You can enable VA tagging Don't be too tall 8 Check the position .

         The virtual address of instruction acquisition or data access of the processor is 64 position . But you have to be 48 Two defined areas are mapped in the bit physical address memory mapping .

        EL2 and EL3 Only TTBR0, No, TTBR1, It means ：

（1） If EL2 Use AArch64, It only uses the scope 0x0~0x0000ffffffffffff Of VA;

（2） If EL3 Use AArch64, It only uses the scope 0x0~0x0000ffffffffffff Of VA;

         The following figure shows that the kernel space is mapped to the highest area of memory and the virtual address space is mapped to the lowest area of memory . however , Both are mapped to a smaller physical address space .

         Conversion control register TCR_EL1 Defines the number of the highest bits that need to be checked .TCR_EL1 contain T0SZ[5:0] and T1SZ[5:0]. The number of this field gives the whole 0 Or all 1 The highest number of . The minimum and maximum values of these fields are specified here , according to granule The size and starting table level are different . therefore , You must always use both spaces , At least two conversion tables are required in all systems . Simple bare systems do not OS It is still required to include fault Table of items .

         TCR_EL1 Controls the EL1 and EL0 Other memory management features of . The above figure only shows the control address range and graunule Size domain .

        IPS The domain controls the maximum output address size . If the output address specified by the conversion is out of range , Error accessing ,000=32 Bit physical address ,101=48 position . two bit TG1 and TG0 Domain gives granularity of kernel or user space ,00=4KB,01=16KB,11=64KB.

         You can configure the conversion table level for the first lookup . The complete conversion process requires three or four levels of page tables . You don't need to achieve all levels . The first level of search consists of granularity and TCR_ELn.TxSZ The domain determines . You can configure it separately TTBR0_EL1 and TTBR1_EL1.