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Huawei certified cloud computing hica
2022-07-06 17:27:00 【bestkasscn】
Huawei certified Cloud Computing HICA
List of articles
- Huawei certified Cloud Computing HICA
- Chapter one Conceptual basis of Cloud Computing
- Chapter two Understand the underlying computer
- Computer development history and system hierarchy
- Von Neumann architecture and derivative architecture
- Instructions 、 Instruction set 、 Instruction cycle 、 Addressing
- CPU structure 、 Interrupt the system 、 Instruction ring
- Computer memory hierarchy
- Bus system
- I/O The system and driving technology are in-depth
- The third chapter Understand the underlying storage
- Chapter four Understand the underlying network
- The fifth chapter Operating system and virtualization
- Chapter six Huawei virtualization solutions -FusionCompute
- Chapter vii. Huawei desktop solutions -FusionAccess Basics
- Chapter viii. Huawei cloud computing experiment
Chapter one Conceptual basis of Cloud Computing
Cloud computing concepts and values
Key features of Cloud Computing
Self service on demand
No human intervention
Ubiquitous network access
Location independent resource pool
Fast elasticity
Pay per use
Background of cloud computing
Demand driven + technical progress + Business model change
Cloud computing is demand driven 、 technical progress 、 The result of joint promotion of business model transformation
The evolution of Cloud Computing
Parallel computing ( Multiple in one host CPU Complete the calculation ) -> Distributed computing ( Divide a big task into several small tasks , Different small tasks are handled by multiple hosts ) -> Grid computing ( Provide users with integrated information and application services ) -> Cloud computing
Deployment mode of cloud computing
Pattern | Users | Builder |
---|---|---|
Public cloud | B/C | A |
Private cloud | A | A |
A hybrid cloud | Use both ( above ) cloud | —— |
A hybrid cloud —— Future trends in Cloud Computing
The business model of Cloud Computing
SaaS(Software as a Service)
Software as a service
PaaS(Platform as a Service)
Platform as a service ( Development platform , For developers )
IaaS(Infrastructure as a Service)
Infrastructure as a service
infrastructure : The server Storage Network devices
Chapter two Understand the underlying computer
Computer development history and system hierarchy
- first generation : Electron tube
- Second generation : The transistor
- The third generation : in / Small scale integrated circuit
- The fourth generation : large-scale integrated circuit
Von Neumann architecture and derivative architecture
form
Arithmetic unit / controller / Memory / input device / Output devices —— Five parts
Program : Instructions + data Must be placed in memory Do not distinguish between instruction storage and data storage
Representation form : All computer instructions and data must be binary
Instructions constitute : opcode + Address code
Command sequence : All instructions must be continuous , Special cases can be discontinuous
Machine central structure : With the arithmetic unit as the center
Computer
controller : Equivalent to the brain of a computer Responsible for taking instructions 、 Analysis instructions
Arithmetic unit : Computing core Participate in the calculation function
- Arithmetic operations : Fixed point data operation , Floating point operation
- Logical operations : Logical and or not
- Displacement calculation
input device : mouse 、 keyboard
Output devices : Monitor 、 The printer
CPU:
- controller : Core components —— CU control unit
- Arithmetic unit : Core components —— ALU Arithmetic unit
The storage system :
MM Main memory —— Memory
PM Secondary storage —— External storage
Instructions 、 Instruction set 、 Instruction cycle 、 Addressing
Instructions constitute :
- opcode : Indicates the meaning of the current instruction ( Arithmetic operations 、 Logical operations 、 Displacement calculation )
- Address code : Indicates the address where the operand is stored | register | Main memory |
Instruction set : A set of computing instructions
CISC: Complex instruction set
X86
RISC: Simple instruction set
ARM PowerPC(IBM)
The more instruction sets The stronger the performance of a certain field
classification
- User instructions : Instructions that ordinary users can execute
- Privileged orders : Instructions that the kernel process can execute ( Affect the overall state of the computer )
- The user executes the instruction : User mode
- The kernel executes instructions : Kernel mode
I / O Instructions It's done by the kernel
User instructions want to call system instructions :System call System function call
Sensitive instructions : Instructions that affect the global state of the computer
stay RISC in , All sensitive instructions are privileged instructions
stay X86 in , Some sensitive instructions are non privileged instructions
Instruction ring :4 Annulus ring 0 ring 1 ring 2 ring3
- ring 0: System kernel instructions
- ring 1、2: System service instruction :windows,linux
- ring 3: User process instructions
Trap command :
The user process sends privileged instructions
The system recognizes whether the instruction is sent by the kernel or by the user
Protect
Sending kernel state instructions triggers instruction traps
Instruction trap : Help the current system complete mode switching
Realization :CPU Interrupt the system
CPU structure 、 Interrupt the system 、 Instruction ring
CPU The clock / Main frequency
CPU The higher the dominant frequency Better performance
Main frequency —— Number of times per unit time
The higher the processing performance , The more transistors
Interrupt the system
help CPU Handling interrupts
When CPU Was interrupted while doing the operation ,CPU The response method is to transfer to the management procedure ( Handling interrupts )
interrupt —— The register stores a
Protect threads : Before the interruption
Restore the thread : Context switching after interrupt processing
Interrupt source :
- Artificial interruption
- Program accident interruption ( stack overflow )
- Hardware failure interrupt ( The main board component is short circuited )
- I/O interrupt (I / 0 Input and output )
process
Allocate resources —— CPU resources Main memory resources I/O
Threads
The smallest unit of resource scheduling , All threads in a process share all resources of the process
Computer memory hierarchy
Memory classification
- storage medium ( Magnetic core 、 disk 、 Compact disc 、 Semiconductor storage )
- Storage nature ( Volatile storage 、 Nonvolatile storage )
- Performance levels ( Main memory 、 cache 、 External storage )
RAM:SRAM static state RAM DRAM dynamic RAM
ROM: PROM( One time erasable ) EPROM EEPROM( Electronics )
cache : Solve the problem of main memory CPU The problem of inconsistent speed
Storage speed :rigister -> MM -> buffer -> PM
Data hotspot : In frequently accessed programs , Eighty percent , It accounts for 20% of the total program
cache : Locality principle
Replacement strategy : General writing ( cache / Main memory is written at the same time )、 Write back ( Write only cache )
Ways to improve cache performance :
- Increase cache capacity
- N Road Association
- Multi level cache
Multi level cache
- L1: L1i Instruction cache L1d Data caching , Every core exclusive
- L2: Every core exclusive
- L3:core share
Bus system
Bus classification
On chip bus : Inside the chip Bus PC——CU
The system bus :
- Address bus : Used to address 32 position 2^32 = 42.9 Billion ~ 4G
- data bus : Used for data I/O
- Control bus : Used to control data bus and address bus
Communication bus : A bus used to communicate between multiple computer systems
Bus standards
- ISA —— Industry standard architecture —— IBM
- EISA —— Extended industry standard architecture —— IBM
- PCI —— External devices are interconnected
- PCI-E stay PCI On this basis intel
Early computer bus interaction logic
Modern computer bus interaction logic
PCH Integrated with South Bridge
I/O The system and driving technology are in-depth
I/O Instructions ( It belongs to a separate set of instructions )
opcode : Operation type ( The arithmetic 、 Logic 、IO)
Command code : read 、 Write —— Inquire about
Equipment code : Device address
Power on direction CPU Register your own I/O Interface ( Plug and play )
Channel command : Only computers with channels can send ( Handle independently I/O chip )
I/O Control mode of exchanging information between equipment and host
Inquire about ( loop IO test )
(CPU Send query instruction wait until busy CPU Send again ready)
interrupt
(CPU send out I/O Instructions ,I/O The equipment is ready to CPU Initiate a break )
DMA
(Direct Memory Acess Direct memory access )
passageway
( Independent chip , Integrated independent channel instructions , Can only handle I/O)
The driver
The driver is responsible for guiding the equipment control to work , take CPU The external instructions sent are translated into internal instructions that can be recognized by the external device
The third chapter Understand the underlying storage
A variety of hard disk interfaces and protocol types
ATA and SATA
- ATA: Advanced technology attachment , Last century 90 The desktop standards of the s
- SATA: yes ATA Upgrade version of Technology , Used to be a desktop computer ATA The main alternative technology of interface hard disk
SCSI Protocols and storage systems
- SCSI It was originally an interface technology developed for minicomputers , Used for connection between host and external equipment
- SCSI Protocol is the basic protocol for communication between host and storage disk
- DAS Use SCSI The protocol realizes the interconnection between host server and storage device
SCSI Bus communication
- When a device uses a bus , Other devices can handle activities in the device
- The device needs to be connected to the bus only when it is transmitting data or reporting status
- The device can disconnect from the bus and then connect to the bus when necessary
- SCSI Connections only occur in initiator and target groups
SCSI: Parallel transmission
Serial SCSI:SAS In the enterprise
file system
- The file system of a computer is a way of storing and organizing computer data , It makes it easy to access and find
- The file system uses the abstract logical concept of files and tree directories instead of the concept of data blocks used by physical devices such as hard disks and optical disks
DAS-NAS-SAN
DAS Connection protocol
ATA and SATA
Inside DAS The most commonly used
SCSI
Serial ( external DAS)
parallel ( Inside DAS)
FC
A high-speed network interconnection technology
DAS management
- Inside DAS
- The host provides :
- Hard disk partition ( Volume management )
- File system layout
- Manage direct attached storage through servers and operating systems
- The host provides :
- external DAS
- Array based management
- Lower total cost of ownership for managing data and storage architectures
SAN
storage area network Storage area network
adopt FC( Optical switches ) perhaps eth( Ethernet )
The server does not have an optical fiber interface by default
It's on the motherboard PCI\PCIE Interface Can pass HBA card The host bus adapter extends the storage interface for the host
FC SAN —— go FC agreement
IP SAN —— go TCP/IP agreement
FC and ETH The protocol is completely incompatible
Chapter four Understand the underlying network
The fifth chapter Operating system and virtualization
Chapter six Huawei virtualization solutions -FusionCompute
Chapter vii. Huawei desktop solutions -FusionAccess Basics
Chapter viii. Huawei cloud computing experiment
Update later ..
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