2837xd code generation module learning (4) -- idle_ task、Simulink Coder

Model links ： link

1 idle_task

  idle_task Module in C2000 Support package library Scheduling In subclass , Figuratively speaking, it realizes our in the writing process while(1) modular . Its setting is shown in the figure below ：

The second attribute in the figure is the preemption flag , It means when the sign is 1 when , Allow external interrupts to break the original execution （ That is, when executing sub functions , Allow the interrupt ）.

The framework of the model is as follows ：

There are two idle_task, A preemptive sign is 0（ The other is for 1）.

experimental result ：

In the generated code, it is obvious that the functions triggered by both modules are while In circulation .

Go into the subfunction , You can see that the generated sub functions are as follows ：

Task1 The preemption flag of is 0, The function generated here also does not allow interruption during execution .

Task2 The preemption flag of is 1, The generated function does not close the interrupt .

2 Simulink Coder

Compile the timing for the control module ,Simulink Provides Simulink Coder library , Today, I mainly tested three modules ：1.Model Header 2.Model Source 3. System Initialize

1.Model Header （ Header file library ） Fill in the parameters as follows , The difference between the two boxes is that one is defined at the top , One is defined at the bottom .

2.Model Source （ Function file ） Fill in the parameters as follows ：

These two are also the same .

3.System Initialize This determines the position in the initialization function .

Let's take a look at the generated code for verification ：

.c The beginning of the file is defined ;

.c The end of the file is also defined , It is consistent with what we filled in the module .

.h Macro definition is carried out at the beginning of the file ：

.h Macro definition is carried out at the end of the file ：

The header and middle of the initialization function carry out relevant code execution ：

Relevant code execution is carried out at the end of the initialization function ：

3 Priority settings

The module distribution is shown in the figure below

The priority can be set through the unified level of modules ： Right click on the module , choice Properties,

Then check Priority Set it up （ The smaller the number, the higher the priority ）

So you can see in the generated code ,GPIO84 The operation of is prior to GPIO67.

  The module is almost completed here , Now I'm ready to learn StateFlow Match and Simulink Build a model , Try making another little thing . Here is my view on model building ： Model building should be divided into two parts: bottom driver and Algorithm , The driving part of the bottom layer can be built through the model . Algorithm by Simulink After the simulation , Peel off the outside , Separately packaged into modules . Define the input 、 Output , adopt Matlab coder It can be converted into C Code . It can also be associated with generated DSP Program model for interface connection , Then generate the corresponding code execution .