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STM32 entry development uses IIC hardware timing to read and write AT24C08 (EEPROM)

2022-07-07 11:23:00 Hua Weiyun

One 、 Introduction to the environment

Programming software : keil5

operating system : win10

MCU model : STM32F103ZET6

STM32 programmatically : Register development ( It is convenient to transplant the program to other single chip computers )

IIC Bus : STM32 It supports IIC Hardware sequential , The adoption of IIC Simulate sequential reading and writing AT24C02, This article introduces STM32 The hardware IIC Configuration method , Read and write AT24C08.

Analog timing is more convenient to transplant to other microcontrollers , More versatile , Regardless of MCU; Hardware timing efficiency is higher , Every MCU Different configuration methods , Rely on hardware support .

Device model : use AT24C08 EEPROM Memory chips

Two 、AT24C08 Memory chip introduction

2.1 Introduction to the functional characteristics of the chip

AT24C08 It's serial CMOS Type of EEPROM Memory chips ,AT24C0x This series includes AT24C01、AT24C02、AT24C04、AT24C08、AT24C16 These specific chip models .

Their capacities are :**1K (128 x 8)、2K (256 x 8)、8K (1024 x 8)、16K (2048 x 8) ,** Among them 8 Express 8 position (bit)

Their pin functions 、 The packaging features are as follows :
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Chip function description :

AT24C08 A series of support I2C, Bus data transfer protocol I2C, The bus protocol specifies any device that transmits data to the bus as a transmitter . Any device that receives data from the bus is a receiver ; Data transmission is controlled by the main device that generates the serial clock and all start and stop signals . Both master and slave devices can be used as transmitters or receivers , But the main device controls the transmission of data ( To send or receive ) The pattern of .

Introduction to chip characteristics :

\1. Low voltage and standard voltage operation
–2.7(VCC=2.7 Fu Zhi 5.5 v )
–1.8(VCC=1.8 Fu Zhi 5.5 v )

\2. Two wire serial interface (SDA、SCL)

\3. There are write protect pins for hardware data protection

\4. Self timed write cycle (5 millisecond ~10 millisecond ), Because there is a page buffer inside , towards AT24C0x After writing data , Still have to wait AT24C0x Write buffer data to the internal EEPROM Area .

\5. Data can be saved up to 100 year

\6. 100 Ten thousand erasure cycles

\7. The high data transfer rate is 400KHz、 low speed 100KHZ and IIC Bus compatible . 100 kHz(1.8V) and 400 kHz(2.7V、5V)

\8. 8 Byte page write buffer
The size of this buffer is related to the specific model of the chip : 8 Byte page (1K、2K)、16 Byte page (4K、8K、16K)

2.2 Chip device address introduction

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because IIC Provisions of the agreement , Every time you transfer data, press 8 Bytes transmitted ,AT24C08 yes 1024 byte , The choice of address is similar to AT24C02 Somewhat different ;

IIC The standard address bit of the device is 7 position . In the picture above AT24C08 Of 1010 Is the internal fixed value of the chip ,A2 It's a hardware pin 、 The level is determined by the hardware ;P1、P0 Is the selection of space storage block , The size of each storage block is 256 byte , The addressing range is 0~255,AT24C08 Equivalent to 4 block AT24C02 Construction ; The last one is reading / Write in (1 Yes. ,0 Yes. ), The read-write bit is not included in the address bit , But according to IIC Sequence of , Before operating the equipment , All need to be sent first 7 Bit address , Send again 1 Bit read write bit , To start the operation of the chip , We are writing simulation sequence for the convenience of unified writing for loop , Send by byte , Therefore, it is generally to 7 Address bits and 1 Bits of reading and writing are spelled together , Combine into 1 Bytes , It is convenient to transmit data by bytes .

On the development board I use now AT24C08 The schematic diagram of is like this :
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So this AT24C08 The standard equipment addresses of are :

First area : 0x50( Hexadecimal ), The corresponding binary is : 1010000

Second area : 0x51( Hexadecimal ), The corresponding binary is : 1010001

The third area : 0x52( Hexadecimal ), The corresponding binary is : 1010010

The fourth area : 0x53( Hexadecimal ), The corresponding binary is : 1010011

If the read and write bits are combined , Device address of read permission :

First area : 0xA1( Hexadecimal ), The corresponding binary is : 10100001

Second area : 0xA3( Hexadecimal ), The corresponding binary is : 10100011

The third area : 0xA5( Hexadecimal ), The corresponding binary is : 10100101

The fourth area : 0xA7( Hexadecimal ), The corresponding binary is : 10100111

If the read and write bits are combined , Write the device address of permission :

First area : 0xA0( Hexadecimal ), The corresponding binary is : 10100000

Second area : 0xA2( Hexadecimal ), The corresponding binary is : 10100010

The third area : 0xA4( Hexadecimal ), The corresponding binary is : 10100100

The fourth area : 0xA6( Hexadecimal ), The corresponding binary is : 10100110

2.3 Yes AT24C08 Instruction flow of writing data by bytes ( sequential )

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Explain in detail :

\1. Send the start signal first

\2. Send device address ( Write permissions )

\3. wait for AT24C08 The reply 、 Low level active

\4. Send storage address 、AT24C08 There is a total of 256 Byte space , Addressing is from 0 At the beginning , The scope is (0~255); Sending this memory address is telling AT24C08 Where will the next data be stored .

\5. wait for AT24C08 The reply 、 Low level active

\6. Send a byte of data , This data is intended to be stored in AT24C08 Data stored in .

\7. wait for AT24C08 The reply 、 Low level active

\8. Send stop signal

2.3 Yes AT24C08 Instruction flow of writing data by page ( sequential )

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Explain in detail :

\1. Send the start signal first

\2. Send device address ( Write permissions )

\3. wait for AT24C08 The reply 、 Low level active

\4. Send storage address 、AT24C08 There is a total of 256 Byte space , Addressing is from 0 At the beginning , The scope is (0~255); Sending this memory address is telling AT24C08 Where will the next data be stored .

\5. wait for AT24C08 The reply 、 Low level active

\6. Can send circularly 8 Bytes of data , This data is intended to be stored in AT24C08 Data stored in .

AT24C08 The page buffer of is 16 Bytes , All loops here can only be sent at most 16 Bytes , More bytes sent will overwrite the previous .

What to pay attention to : The addressing of this page buffer is also from 0 Start , such as : 0~15 Calculate the first 1 page ,16~32 Calculate the first 2 page … By analogy . If the starting address of writing data now is 3, Then there is only one page left 13 Bytes can be written ; It's not that you can write circularly from anywhere 16 Bytes .

Detailed process : Here the program generally uses for Cycle to achieve

(1). Send byte 1

(2). wait for AT24C08 The reply , Low level active

(3). Send byte 2

(4). wait for AT24C08 The reply , Low level active

most 8 Time .

\7. wait for AT24C08 The reply 、 Low level active

\8. Send stop signal

2.4 from AT24C08 Read arbitrary byte data at any address ( sequential )

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AT24C08 Support current address reading 、 Read from any address , The most commonly used address is arbitrary reading , Because you can specify the address to read data , More flexible , The above designated sequence diagram is any address read .

Explain in detail :

\1. Send the start signal first

\2. Send device address ( Write permissions )

\3. wait for AT24C08 The reply 、 Low level active

\4. Send storage address 、AT24C08 There is a total of 2048 Byte space , Addressing is from 0 At the beginning , The scope is (0~1024); Sending this memory address is telling AT24C08 Next, you should return the data of that address to the MCU .

\5. wait for AT24C08 The reply 、 Low level active

\6. Resend the start signal ( Switch between read and write mode )

\7. Send device address ( Read permission )

\8. wait for AT24C08 The reply 、 Low level active

\9. Loop read data : receive AT24C08 Returned data .

There is no byte limit for reading data , It's possible to 1 Bytes 、 You can also read the whole chip continuously .

\10. Send non response ( High active )

\11. Send stop signal

3、 ... and 、IIC Bus Introduction

2.1 IIC Introduction to bus

I2C(Inter-Integrated Circuit) The bus is made up of PHILIPS Two wire serial bus developed by the company , Used to connect microcontrollers and their peripherals , It is a bus standard widely used in the field of microelectronic communication and control . There are few interface lines , The control mode is simple , The device package is small , The communication rate is higher .

I2C Procedure application master / From two-way communication . The device sends data to the bus , Is defined as the transmitter , The data received by the device is defined as the receiver . Both master and slave devices can work in receiving and transmitting states .

I2C The bus passes serial data (SDA) Line and serial clock (SCL) The wire transfers information between devices connected to the bus . Each device has a unique address identification , And can be used as a transmitter or receiver ( Determined by the function of the device ).

I2C There are four working modes :
1. Host send
2. The host receives
3. Slave send
4. The slave receives

I2C The bus uses only two wires : Serial data SDA(Serial Data)、 The serial clock SCL(Serial Clock).

The bus must be controlled by the host ( It's usually a microcontroller ) control , The host generates a serial clock (SCL) Control the transmission direction of the bus , And create start and stop conditions .

SDA The data status on the line is only SCL For low level period can change .

2.2 IIC Device connection diagram on the bus

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I2C The bus is very simple in physical connection , By SDA( Serial data line ) and SCL( Serial clock line ) And pull-up resistor . The principle of communication is to SCL and SDA Line high and low level timing control , To produce I2C The signal required by the bus protocol is used for data transmission . When the bus is idle , These two wires are generally pulled up by the pull-up resistance connected above , Keep the high level .

The range of pull-up resistance is 4.7K~100K.

2.3 I2C Bus characteristics

I2C Each device on the bus can be used as a master or slave , And each slave device will correspond to a unique address ( It can be downloaded from I2C Device data book ). The master and slave devices use this address to determine which device to communicate with , In common applications , We put CPU belt I2C The bus interface module acts as the master device , Use other devices connected to the bus as slave devices .

1. The number of devices that can be connected on the bus
I2C The number of devices that can be connected on the bus is affected by the maximum capacitance of the bus 400pF Limit , If a device of the same model is attached , It is also limited by the device address .
commonly I2C The address of the device is 7 Bit address ( Also have 10 position ), The address is divided into two parts : Chip solidification address ( When producing chips, which ones are grounded , Which ones are connected to the power supply , Fixed ), Programmable address ( extraction IO mouth , Determined by the hardware device ).
for example : A certain device is 7 Bit address , among 10101 xxx high 4 The bit is fixed when it leaves the factory , low 3 The position can be decided by the designer .
Then one I2C Only this kind of device can be hung on the bus at least 8 individual .
If 7 Bit addresses can be programmed , That can be achieved in theory 128 Devices , But in practice, there will not be so many mounts .

2. Bus speed transmission speed :
I2C The bus data transmission rate can reach... In standard mode 100kbit/s, It can be reached in fast mode 400kbit/s, It can be reached in high speed mode 3.4Mbit/s. Usually by I2C Bus interface programmable clock to realize the adjustment of transmission rate .

3. Bus data length
I2C Between master and slave devices on the bus in bytes (8 position ) For two-way data transmission .

2.4 I2C Bus protocol basic timing signal

** Idle state :**SCL and SDA All remain high .

** Starting conditions :** When the bus is idle ,SCL and SDA All remain high , When SCL For high level period SDA Jump from high to low , Indicates that a starting condition is generated . After the initial conditions are generated , The bus is busy , It is exclusively owned by the master and slave equipment of this data transmission , other I2C The device cannot access the bus .

** Stop conditions :** When SCL For high and SDA Jump from low to high , Indicates that a stop condition is generated .

** Promise signal :** The next clock signal after the transmission of each byte , stay SCL During high level ,SDA For low , It means a reply signal .

** Non promise signal :** The next clock signal after the transmission of each byte , stay SCL During high level ,SDA For the high , It means a reply signal . The answer signal or non answer signal is sent by the receiver , The transmitter detects this signal ( transmitter , The receiver can be a slave device or a master device ).

Be careful : The start and end signals are always generated by the main equipment .

2.5 Start signal and stop signal

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The starting signal is : Clock line SCL At high level , cable SDA The process of changing from high level to low level .SCL=1;SDA=1;SDA=0;

The stop signal is : Clock line SCL At low level , cable SDA The process of changing from low level to high level .SCL=1;SDA=0;SDA=1;

2.6 Answer signal

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The number of data bits 9 Bit on time reply bit . The process of reading the reply bit is the same as that of reading the data bit . Example : SCL=0;SCL=1;ACK=SDA; This ACK Is the read response status .

2.7 Data bit transmission sequence

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Through the sequence diagram, we know ,SCL At high level, the data is stable ,SCL The data is unstable when it is at low level .

So for writing one bit data (STM32—>AT24C08): SCL=0;SDA=data; SCL=1;

So for reading one bit of data (STM32<-----AT24C08): SCL=0;SCL=1;data=SDA;

2.8 Bus timing

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Four 、IIC Bus timing code 、AT24C08 Read and write code

In the debug IIC When simulating timing , You can buy one on Taobao 24M Of USB Logic analyzer , There is a problem with the timing , Using the logic analyzer, you can quickly find the problem .
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4.1 iic.c This is a STM32 Of IIC Hardware timing complete code

/* The functionality :  initialization IIC Bus hardware connection : SCL---PB6 SDA---PB7*/void IIC_Init(void){	 /*1.  Clock configuration */	 RCC->APB2ENR|=1<<3; //PB 	 /*2. GPIO Port mode configuration */	 GPIOB->CRL&=0x00FFFFFF;	 GPIOB->CRL|=0xFF000000; // Reuse open drain output 	 GPIOB->ODR|=0x3<<6;			 /*3. GPIO Port clock configuration ( The order cannot be wrong )*/	 RCC->APB1ENR|=1<<21; //I2C1 The clock 	 RCC->APB1RSTR|=1<<21; // Turn on the reset clock 	 RCC->APB1RSTR&=~(1<<21);// Turn off the reset clock 		 /*4.  To configure IIC Core register of */	 I2C1->CR2=0x24<<0;  // Configure the host frequency to 36MHZ	 I2C1->CCR|=0x2D<<0; // The configuration host frequency is 400KHZ	 I2C1->CR1|=1<<0;    // Turn on IIC modular 		/* CCR= Host clock frequency /2/IIC The frequency of the bus  45=36MHZ/2/400KHZ ---0x2D */}/* The functionality :  When the clock line is high when sending the start signal , The process of changing a data line from high level to low level */void IIC_SendStart(void){	I2C1->CR1|=1<<8; // Generate the starting signal 	while(!(I2C1->SR1&1<<0)){} // Wait for the start signal to complete 	I2C1->SR1=0; // Clear status bit }/* The functionality :  Stop signal when the clock line is high , The process of changing a data line from a low level to a high level */void IIC_SendStop(void){		I2C1->CR1|=1<<9;}/* The functionality :  Send address data */void IIC_SendAddr(u8 addr){	u32 s1,s2;	I2C1->DR=addr; // send data 	while(1)	{			s1=I2C1->SR1;			s2=I2C1->SR2;		  if(s1&1<<1) // Determine whether the address has been sent successfully 			{					break;			}	}}/* The functionality :  send data */void IIC_SendOneByte(u8 addr){	u32 s1,s2;	I2C1->DR=addr; // send data 	while(1)	{			s1=I2C1->SR1;			s2=I2C1->SR2;			if(s1&1<<2) // Judge whether the data has been sent successfully 			{					break;			}	}}/* The functionality :  Receive a byte of data */u8 IIC_RecvOneByte(void){	u8 data=0;	I2C1->CR1|=1<<10; // Enable reply 	while(!(I2C1->SR1&1<<6)){} // Waiting for data 	data=I2C1->DR;	I2C1->CR1&=~(1<<10); // Turn off reply enable 	return data;}

4.2 AT24C08.c This is a AT24C08 Complete read and write code

* The functionality :  Write a byte function parameter :	u8 addr  The location of the data (0~1023)	u8 data  Data range (0~255)*/void AT24C08_WriteOneByte(u16 addr,u8 data){    u8 read_device_addr=AT24C08_READ_ADDR;	u8 write_device_addr=AT24C08_WRITE_ADDR;    if(addr<256*1) // The first piece     {        write_device_addr|=0x0<<1;        read_device_addr|=0x0<<1;    }    else if(addr<256*2) // The second piece     {        write_device_addr|=0x1<<1;        read_device_addr|=0x1<<1;    }    else if(addr<256*3) // Third block     {        write_device_addr|=0x2<<1;        read_device_addr|=0x2<<1;    }    else if(addr<256*4) // The fourth block     {        write_device_addr|=0x3<<1;        read_device_addr|=0x3<<1;    }    addr=addr%256; // Get the address range         IIC_SendStart();// Start signal     IIC_SendAddr(write_device_addr);// Send device address     IIC_SendOneByte(addr); // The address where the data is stored     IIC_SendOneByte(data); // Send the data to be stored     IIC_SendStop(); // Stop signal     DelayMs(10); // Waiting to write }/* The functionality :  Read a byte function parameter : u8 addr  The location of the data (0~1023) Return value :  Data read */u8 AT24C08_ReadOneByte(u16 addr){    u8 data=0;    u8 read_device_addr=AT24C08_READ_ADDR;	u8 write_device_addr=AT24C08_WRITE_ADDR;    if(addr<256*1) // The first piece     {        write_device_addr|=0x0<<1;        read_device_addr|=0x0<<1;    }    else if(addr<256*2) // The second piece     {        write_device_addr|=0x1<<1;        read_device_addr|=0x1<<1;    }    else if(addr<256*3) // Third block     {        write_device_addr|=0x2<<1;        read_device_addr|=0x2<<1;    }    else if(addr<256*4) // The fourth block     {        write_device_addr|=0x3<<1;        read_device_addr|=0x3<<1;    }    addr=addr%256; // Get the address range     IIC_SendStart();// Start signal     IIC_SendAddr(write_device_addr);// Send device address     IIC_SendOneByte(addr); // The address where the data will be read     IIC_SendStart();// Start signal     IIC_SendAddr(read_device_addr);// Send device address     data=IIC_RecvOneByte();// Reading data     IIC_SendStop(); // Stop signal     return data;}/* The functionality :  Read the data function parameters of the specified length from the specified position : u16 addr  The location of the data (0~1023) u16 len  Read length  u8 *buffer  Store the returned value of the read data :  Data read */void AT24C08_ReadByte(u16 addr,u16 len,u8 *buffer){	 u16 i=0;	IIC_SendStart();// Start signal 	IIC_SendAddr(AT24C08_WRITE_ADDR);// Send device address 	IIC_SendOneByte(addr); // The address where the data will be read  	IIC_SendStart();// Start signal 	IIC_SendAddr(AT24C08_READ_ADDR);// Send device address 		for(i=0;i<len;i++)	{			buffer[i]=IIC_RecvOneByte();// Reading data 	}	IIC_SendStop(); // Stop signal }/* The functionality : AT24C08 Page write function parameters : u16 addr  Write location (0~1023) u8 len  Write length ( each page 16 byte ) u8 *buffer  Store the read data */void AT24C08_PageWrite(u16 addr,u16 len,u8 *buffer){		u16 i=0;		IIC_SendStart();// Start signal 		IIC_SendAddr(AT24C08_WRITE_ADDR);// Send device address 		IIC_SendOneByte(addr); // The address where the data is stored 		for(i=0;i<len;i++)		{			IIC_SendOneByte(buffer[i]); // Send the data to be stored 		}		IIC_SendStop(); // Stop signal 		DelayMs(10); // Waiting to write }/* The functionality :  Write the data function parameters of the specified length from the specified position : u16 addr  The location of the data (0~1023) u16 len  Write length  u8 *buffer  Store the return value of the data to be written :  Data read */void AT24C08_WriteByte(u16 addr,u16 len,u8 *buffer){		u8 page_byte=16-addr%16; // Get the number of bytes remaining in the current page 		if(page_byte>len) // Judge whether the remaining byte space of the current page is enough to write 		{				page_byte=len; // It means that you can write... At one time 		}		while(1)		{				AT24C08_PageWrite(addr,page_byte,buffer); // Write a page 				if(page_byte==len)break; // Finished writing 				buffer+=page_byte; // Pointer offset 				addr+=page_byte;// Address offset 				len-=page_byte;// Get the remaining unfinished length 				if(len>16)page_byte=16;				else page_byte=len; // You can write it all at once 		}}

4.3 main.c This is a AT24C08 Test code

#include "stm32f10x.h"#include "beep.h"#include "delay.h"#include "led.h"#include "key.h"#include "sys.h"#include "usart.h"#include <string.h>#include <stdio.h>#include "exti.h"#include "timer.h"#include "rtc.h"#include "adc.h"#include "ds18b20.h"#include "ble.h"#include "esp8266.h"#include "wdg.h"#include "oled.h"#include "rfid_rc522.h"#include "infrared.h"#include "iic.h"#include "at24c08.h"u8 buff_tx[50]="1234567890";u8 buff_rx[50];u8 data=88;u8 data2;int main(){       u8 key;    LED_Init();    KEY_Init();    BEEP_Init();    TIM1_Init(72,20000); // Auxiliary serial port 1 receive , The timeout is 20ms    USART_X_Init(USART1,72,115200);    IIC_Init(); //IIC Bus initialization     printf("usart1 ok\n");    while(1)    {        key=KEY_Scanf();        if(key)        {            //AT24C08_WriteByte(100,50,buff_tx);            //AT24C08_ReadByte(100,50,buff_rx);            //printf("buff_rx=%s\n",buff_rx);               // Test section 0 block // data=AT24C08_ReadOneByte(0);// AT24C08_WriteOneByte(0,data+1);// printf("data=%d\n",data);               // Test section 1 block // data=AT24C08_ReadOneByte(300);// AT24C08_WriteOneByte(300,data+1);// printf("data=%d\n",data);               // Test section 2 block // data=AT24C08_ReadOneByte(600);// AT24C08_WriteOneByte(600,data+1);// printf("data=%d\n",data);               // Test section 3 block              data=AT24C08_ReadOneByte(900);             AT24C08_WriteOneByte(900,data+1);             printf("data=%d\n",data);        }    }}
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