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Kuntai ch7511b scheme design | ch7511b design EDP to LVDS data | pin to pin replaces ch7511b circuit design
2022-07-08 01:10:00 【qq1659747718】
Quintiles CH7511B The project design |CH7511B Design EDP turn LVDS Information |pin to pin replace CH7511B Circuit design
Chrontel Of CH7511B It's a low cost 、 Low power semiconductor devices , It will be embedded DisplayPort The signal is converted to LVDS( Low pressure differential signal ). This innovative DisplayPort The receiver has an integrated circuit LVDS Transmitter , Designed for multi-functional integration PC And laptop market . adopt CH7511B Advanced decoding / Coding algorithm , Input eDP High speed serial video data can be seamlessly converted into LVDS,LVDS It is a popular Chinese / large LCD Display high-speed serial link display technology . utilize eDP Unique source / Remit “ Link training ” Program , When CH7511B When the initialization process between and the graphics chip is completed ,CH7511B Can immediately report to LCD Show video .CH7511B The design conforms to the embedded system DisplayPort standard 1.2 edition . In the receiving module of the device , It supports two eDP Main link input , Data rate is 1.62Gb/s or 2.7Gb/s, Acceptable 18 position 6:6:6 or 24 position 8:8:8 Of RGB Digital format , For up to 1920x1200 Of LVDS Output . In order to meet GPU New energy-saving plan , For example, reduce the display frame rate ,CH7511B Equipped with dynamic refresh rate switching method , It can be automatically lowered to LVDS The low refresh rate supported by the panel . Integrate LVDS The transmitter supports single port and dual port LVDS Output , To drive up to WUXGA(1920x1200) The display resolution of .CH7511B Supported by GPIO[0:3] The pin controls or writes to the chip register to select the panel . In order to reduce the EMI launch ,CH7511B Of LVDS The encoder block adopts spread spectrum control , Its spread spectrum percentage can be adjusted through internal registers .
CH7511B Parameter properties :
Support embedded DisplayPort(eDP) standard 1.2 edition .
Support 2 The main chain , The link rate is 1.62Gb/s or 2.7Gb/s, Suitable for laptop applications
Support to input color depth 6, Each pixel 8 Bit RGB Format
Support enhanced frame mode
Support VESA and CEA Timing standard , Resolution up to 1920x1200,8 An input , The refresh rate is 60Hz
Support dynamic refresh rate switching
Support Gamma correction
Panel tuning methods include jitter and 6 position +FRC
The embedded DisplayPort Fast full link training of the system
Support eDP authentication : Optional scrambling seed reset and optional framing
2 Working mode : Connect 27MHz Crystal , Inject 27MHz The clock
Programmable LCD panel power sequence
Support 18 Bit single port 、18 Bit dual port 、24 Bit single port and 24 Bit dual port LVDS Output interface
Support LVDS Application's OpenLDI and SPWG Bit mapping
Support panel selection by GPIO The pin controls or writes to the chip register .
agile LVDS Output pin exchange
Blank panel when invalid input
Support PWM. The backlight brightness is controlled through the auxiliary channel ,PWM Pins and BLUP/BLDN The pin supports dynamic backlight control
BLUP/BLDN Support when the pin controls the backlight brightness OSD Show
Hot swap detection
Boot is loaded automatically when starting up ROM
Serial boot ROM Data is passed through I2C Bus or auxiliary channel update
Programmable power management
eDP Input and LVDS Output EMI Reduce capacity . Spread spectrum control can be used for transmission LVDS The signal
QFN68 encapsulation
CH7511B Package pin :

CH7511B Design EP turn LVDS Block diagram of scheme structure :

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