当前位置:网站首页>[adjustable delay network] development of FPGA based adjustable delay network system Verilog

[adjustable delay network] development of FPGA based adjustable delay network system Verilog

2022-07-06 03:53:00 FPGA and MATLAB

1. Software version

ISE14.7

2. System principle

      “ Network control system ” There are generally two understandings , One is the control of the network (Control of Network); The other is the control system that transmits information through the network (Control through Network). Both systems are inseparable from control and network , But the focus is different . The former refers to network routing 、 Scheduling and control of network data flow , It is the control of the network itself , It can be realized by using the methods of operations research and control theory ; The latter refers to the nodes of the control system ( sensor 、 controller 、 Actuators etc. ) The data between is not traditional point-to-point , It is transmitted through the network , It is a distributed control system , It can be studied by establishing its mathematical model with the method of control theory . chart 1 The structure of network control system is given . The main content of this paper is the latter , namely : Network control system .

chart 1 Network controller structure diagram

        In network control system , Distributed control mode is usually adopted . There are many structural forms of distributed control , One of the typical structures is the network control system based on Fieldbus . In this structural form , The whole system forms a closed loop through the network bus , Therefore, there is time delay caused by communication delay in the loop . When the delay is less than the sampling period , Its impact is negligible ; When the time delay relative to the sampling period cannot be ignored , The influence of time delay must be considered in the analysis and design of the system . At the sensor 、 When the actuator and controller exchange data through the network , Produce

原网站

版权声明
本文为[FPGA and MATLAB]所创,转载请带上原文链接,感谢
https://yzsam.com/2022/187/202207060344546711.html